This article presents a wideband balanced variable-gain low-noise amplifier (VG-LNA) implemented in 55-nm CMOS process. The proposed LNA has two cascode stages with an interstage matching transformer to constitute fourth-order magnetically coupled resonator resonant peaks. frequency-selective gain equalization technique is compensate for the variation of dual-resonant tanks. VG-LNA leverages current-steering realize phase-invariant 18-dB tunable range measured input 1-dB compression point...

This article presents a four-element 7.5-9-GHz phased-array receiver with 1-8 concurrent beams in 65-nm CMOS technology. Each output beam utilizes all the input elements to maximize beamforming gain. To realize low-power and compact design, multielement multibeam architecture features gm-based variable-gain phase shifter (VG-PS) current-sharing active combiner. The VG-PS 6-bit resolution achieves <; 2° root mean square (rms) error 0.3 dB rms gain at maximum setting. demonstrates 20-dB power...

This letter presents a Ka-band compact eight-element four-beam phased-array receiver to improve communication capacity for millimeter-wave satellite communications. To address the design challenge of large area induced by multibeam forming, utilizes digital-assisted variable-gain phase shifting technique and an active combining scheme enable implementation facilitate array design. The achieves 360° range with 6-bit resolution 25-dB attenuation 0.5-dB step. measured root mean square (rms)...

This article presents a 7-bit wideband passive attenuator with low insertion loss (IL) and high attenuation accuracy in 55-nm CMOS technology. The π-type bridge-T-type units utilize an effective capacitive compensation technique, whose bandwidth extension mechanism is detailed single-unit pole-zero analysis. matching-induced performance deterioration investigated to minimize amplitude phase errors at the chip level. fabricated demonstrates 32.4-dB range 0.255-dB resolution 3.5-8.4-dB IL from...

Phased arrays have demonstrated great potential in 5/6G communication, radar and sensor applications [1 -4]. To achieve excellent performance, phased require lownoise high-linearity front-ends [5]. Most importantly, demand uniform performance from all elements for optimum receiving G/T value transmission effective isotropic radiated power (EIRP) [6]. Figure 14.7.1 exemplifies it with an array whose antenna element has 3dBi gain on one side no radiation the other side. When 8×1 linear a λ/2...

This brief presents a 24–28-GHz variable-gain phase shifter (VG-PS) and geometric-projection-based three-point calibration scheme. The VG-PS achieves 360° phase-shifting range with 6-bit resolution an 8-dB gain-tuning 0.25-dB step size. proposed scheme the optimal control codes directly from only three measurements to optimize amplitude precision saves need for I/Q calibration. chip is fabricated in 65-nm CMOS process, occupies 0.27-mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML"...

This letter presents an ultrawideband 7-bit digital-step attenuator (DSA). Capacitive compensation technique is utilized to improve the amplitude and phase accuracy enable wideband operation. The implemented in a 55-nm CMOS process occupies 0.044-mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> core area. It demonstrates 15.9-dB attenuation range with 0.125-dB step size. measured insertion loss (IL) 2.7–6.6 dB at dc–28 GHz rms errors...

This paper presents a 4-element 7.5-9 GHz phased array receiver with 1-8 concurrent beams in 65-nm CMOS technology. All the elements are fully-connected to each output beam using 32 phase shifters and 8 active combiners. The current-starving gm-based shifter 6-bit resolution achieves <; 2° RMS error 0.3 dB gain error. demonstrates 20 gain, 3.6 noise figure (NF) -19 dBm input 1-dB compression point (IP1dB) band for element. chip occupies 5.42 × 3.62 mm <sup...

This letter presents a 7–9-GHz four-element eight-beam receiver front end (FE) in 65-nm CMOS for satellite communications. To boost the linearity and defeat interferences, FE proposes strength-oriented nonlinearity cancellation (SoNC) technique based on multigate transistors (MGTRs). It demonstrates 22-dB single-element gain with 7-dB noise figure (NF) at 7.5 GHz. The measured input-referred 1-dB compression point (IP <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML"...

A true-time-delay-based (TTD-based) receiver front end with 800-ps time delay for 6.5-9-GHz wideband phased arrays has been designed satellite communication in a 65-nm CMOS technology. The proposed consists of balanced low-noise amplifier (LNA), 6-bit attenuator 15.75-dB tuning range, programmable TTD element featuring 25-ps step, and an output buffer amplifier. differential origami inductor is to boost the unit's quality factor mitigate insertion loss introduced by artificial transmission...

This paper presents a wideband balanced variable-gain low-noise amplifier (VGLNA) implemented in 55-nm CMOS process. A frequency-selective non-foster gain equalization technique is proposed to compensate the variation of interstage dual-resonant tanks. VGLNA leverages current-steering realize phase-invariant 18-dB tunable range with measured input 1-dB compression point (IP1dB) at 9 GHz from -12.2 dBm -5 dBm. The LNA achieves maximum power 20.2 dB ±0.5 and minimum noise figure (NF) 3.26 6.5...

This article presents an eight-element 17.7–19.2-GHz receiver front end with 1–2 concurrent beams in a 65-nm CMOS technology. Each output beam utilizes temperature-compensation variable-gain amplifier (TC-VGA) to minimize the temperature-induced gain variation. The concept of proposed TC-VGA and realization corresponding adaptive analog control are introduced detail. front-end architecture circuit-level design enable flat wideband response, precise phase amplitude control, low power...

This paper presents a C-band four-element eight-beam phased-array receiver. By utilizing the proposed merged gain-programmable phase shifter (GPS) technique, chip achieves 360° phase-shifting range with <2.4° rms error and 20.5-dB gain <0.18 dB amplitude at 4.5-7 GHz. The demonstrates 23.5-dB 6.5-dB noise figure (NF) 5 multigated transistor (MGTR) receiver realizes -10.8-dBm input 1-dB compression point (IP <inf xmlns:mml="http://www.w3.org/1998/Math/MathML"...

Supporting unbounded transactions and operating system (OS) are two notable challenges that need to be efficiently resolved by practically accepted hardware transaction memory (HTM) systems. Current proposals heavily rely on traditional cache handle version management or conflict detection support poorly resolve these challenges. Traditional approach brings either unavoidable design complexity large performance costs. We propose DTM (decoupled transactional memory), a comprehensive...

A pole extraction method using an early-time and late-time responses combined technique is presented. Without the determination of beginning target transient response, proposed assumes ARMA representation to approximate complete a total least square applied poles extraction. The validated measured scattering data thin wire finite cylinder. processing results show that superior KT matrix pencil in appropriate SNR.

This letter presents a 26–34.5-GHz power amplifier (PA) fabricated in 65-nm bulk CMOS with core area of 0.338 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . To reduce the mismatch conversion between single-ended and differential signals, symmetry baluns is analyzed detail. achieve broadband operation, wideband source impedance matching network introduced. The measured small signal gain 25.1 dB, proposed PA achieves 21.6-dBm...

This article presents a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$C$</tex-math> </inline-formula> -band multibeam phased-array receiver for high-throughput wireless communications. The proposed four-element beamformer supports 1–8 co-aperture simultaneously reconfigurable beams and demonstrates 23-dB gain 6.5-dB noise figure (NF) at 5 GHz. In addition, it leverages large-signal nonlinearity...

This article presents a 17.720.2 GHz eight-element four-beam RF-beamforming transmitter in 65-nm CMOS for satellite communication (SATCOM). The utilizes an analog scheme the variable-gain amplifier (VGA) to achieve dB-in-linear gain control with high dynamic range (DR), together current combining crossbar compact footprint. vector-modulation-based (VM-based) phase shifter (PS) adopts cancellation-based <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML"...

This paper presents a matching-pursuits based technique to radar target feature extraction for aspect sensitivity reduce of template, including training algorithm the atom dictionary characterize scattering. There is an important contribution in our that finite basis atoms, as features, are used represent complicatedly scattering behavior whole waveform without any prior parameterization model hypothesis. Furthermore, demonstrated this paper, proposed can effectively dependence extracted...