A5058568621- Radio Frequency Integrated Circuit Design
- Advancements in PLL and VCO Technologies
- Photonic and Optical Devices
- Atomic and Subatomic Physics Research
- Full-Duplex Wireless Communications
- Analog and Mixed-Signal Circuit Design
- Electromagnetic Compatibility and Noise Suppression
- Non-Invasive Vital Sign Monitoring
- Microwave Engineering and Waveguides
- Advanced Fiber Optic Sensors
- Advanced Frequency and Time Standards
- Gas Sensing Nanomaterials and Sensors
- Quantum optics and atomic interactions
- Belt Conveyor Systems Engineering
- Remote Sensing and Land Use
- Magnetic properties of thin films
- Physical Unclonable Functions (PUFs) and Hardware Security
- Geomechanics and Mining Engineering
- Electrochemical sensors and biosensors
- Molecular Communication and Nanonetworks
- Advanced Optical Sensing Technologies
- Nanoparticle-Based Drug Delivery
- Remote Sensing in Agriculture
- Security and Verification in Computing
- Cryptographic Implementations and Security
Michigan State University
2023
Shenzhen Luohu People's Hospital
2023
Quanzhou Institute of Equipment Manufacturing Haixi Institute
2022
Chinese Academy of Sciences
2022
China University of Petroleum, East China
2021
Tokyo Institute of Technology
2017-2021
Dalian University
2020
Northeastern University
2018
Shanghai Jiao Tong University
2014-2017
Shandong University of Science and Technology
2012
This article presents the first 39-GHz phased-array transceiver (TRX) chipset for fifth-generation new radio (5G NR). The proposed consists of 4 sub-array TRX elements with local-oscillator (LO) phase-shifting architecture and built-in calibration on phase amplitude. scheme is to alleviate amplitude mismatch between each element, especially a large-array system in base station (BS). Based LO architecture, has 0.04-dB maximum gain variation over 360° full tuning range, allowing constant-gain...
An easily fabricated Fabry-Perot optical fiber humidity sensor with high performance was presented by filling Graphene Quantum Dots (GQDs) into the resonator, which consists of two common single mode fibers. The relative sensing experimentally investigated an interference spectrum drift between 11 %RH to 85 %RH. 0.567 nm/%RH sensitivity and 0.99917 linear correlation were found in experiments that showed sensitivity, good wide-range responding. Meanwhile, its responding repeatability...
This article introduces a chip-scale ultralow-power atomic clock (ULPAC) in the microwave frequency region. A new suspended quantum package architecture along with fully integrated probing and locking loop implemented CMOS technology results compact consumption. In addition, dedicated low-noise magnetic field temperature control loops are incorporated for isolating mitigating internal external factors affecting stability. The output of crystal oscillator is continuously compensated...
This paper presents a 60-GHz transceiver for low-power high-speed short-range wireless using the proposed binary-phase on-off keying (BPOOK) modulation scheme. The BPOOK transmits radio frequency (RF) signal with amplitude modulated on and off by input baseband data, meanwhile, phase is changing between 0° 180°. achieves doubled spectral efficiency compared OOK binary-phase-shift (BPSK) modulation. It also cancels intrinsic local-oscillator feed through (LOFT) issue in RF can be demodulated...
In this paper, a fully-synthesizable digital-to-time (DTC)-based fractional-Nmultiplying delay-locked loop(MDLL) is presented. Noise and linearity of synthesizable DTCs are analyzed, two-stage DTC proposed in which path-selection used as the coarse stage variable-slope fine stage. To calibrate nonlinearity, highly robust zero-order interpolation based nonlinearity calibration proposed. Besides, static phase offsets (SPO) between bang-bang detector (BBPD) multiplexer (MUX) calibrated by...
In the domain of 3D object classification, a fundamental challenge lies in addressing scarcity labeled data, which limits applicability traditional data-intensive learning paradigms. This is particularly pronounced few-shot scenarios, where objective to achieve robust generalization from minimal annotated samples. To overcome these limitations, it crucial identify and leverage most salient discriminative features objects, thereby enhancing efficiency reducing dependency on large-scale...
The following topics are dealt with: CMOS integrated circuits; silicon-on-insulator; low noise amplifiers; low-power electronics; circuit design; 5G mobile communication; Ge-Si alloys; radio receivers; millimetre wave power amplifiers.
In this article, a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$Ka$ </tex-math></inline-formula> -band satellite communication (SATCOM) transceiver is first presented using standard CMOS technology. The proposed SATCOM consists of high-linearity transmitter (TX) and dual-channel receiver (RX); both TX RX are based on direct-conversion architecture. By implementing the RX, multiple multiplexing modes,...
This paper presents a fully-synthesizable fractional-N injection-locked PLL in 65 nm CMOS. A true arbitrary non-linearity calibration scheme is specifically proposed for synthesizable DTC, together with an extensive digital of the PLL. The RMS jitter 1.2 ps and 0.3 achieved at 1 GHz output integer-N operation, respectively. power consumption 2.5 mW 2.2 mW, corresponding to FoM −234.4 dB −246.7 dB.
A fully synthesizable injection-locked phase-locked loop (IL-PLL) for digital clocking is proposed in this letter. The (PLL) implemented a 5-nm CMOS process, with only standard cells are used. With triple-path operation and offset control digital-to-time converter (DTC), low-jitter fractional-N frequency synthesis, highly-linear spread-spectrum realized low-power consumption. PLL core area 0.0036 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML"...
This paper presents an injection-locked PLL that employs RC pulse generator and injection timing calibration to enhance the jitter reference spur performance. An ultra-low power oscillator is designed reduce overall consumption of PLL. The chip fabricated in 65nm CMOS technology, occupying area 0.25mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . proposed ILPLL achieves 70fs <sub xmlns:xlink="http://www.w3.org/1999/xlink">rms</sub>...
In this letter, a fully synthesizable injection-locked phase-locked loop (IL-PLL) is presented. The proposed PLL employed nonmodified digital standard cell library, and enable fast design migration to other processes. To minimize the reference spur, self-clocked nonoverlap update scheme reduce spur caused by logic clocking. Besides, slope-balanced symmetrical multiplexer (MUX) subsampling bang-bang phase detector (SS-BBPD) proposed. With constraint-directed automatic layout synthesis, delay...
This paper presents a RTL-described sub-GHz IoT transceiver(TRX) in 65nm CMOS with 3.3/4.6mW RX/TX power consumption. Most of the TRX is fully-synthesizable foundry provided standard cells. The has ring oscillator(RO) based fractional-N injection-locked(IL-PLL) PLL, digital frequency shift keying(FSK) transmitter, and digital-intensive heterodyne receiver all-digital intermediate frequency(IF) stage. To mitigate adverse effects layout uncertainty process voltage temperature(PVT) variations,...
The Huanggang Reservoir capacity is affected by a variety of factors. In order to accurately understand the change, we develop new hydrological prediction model based on LSTM (Long-Short-Term Memory) method, which used predict reservoir. this modified model, choose input multidimensional factors, two fully connected layers, selecting optimal number hidden neurons, optimizer, and adding attention mechanism. result using Developed usual shows that curve can fit true value better than mean...
This paper presents the first Ka-band satellite communication (SATCOM) transceiver in standard CMOS technology. The proposed SATCOM is based on direct-conversion architecture with high-linearity TX and dual-channel multi-mode RX, which designed for a earth ground platform communicating Geostationary (GEO) low Earth orbit (LEO) satellites. RX enables multiple duplexing modes, are polarization frequency duplexing. In receiver, both RF path baseband provide variable gain wider dynamic range....
An optical fiber Fabry-Perot (F-P) humidity sensor was fabricated using polyvinyl alcohol (PVA) and a single-mode fiber.Humidity response experiments were carried out in the range of 22-98% RH with cycle rising falling to investigate repeatability its humidity.The sensitivity 36.71 pm/% relative (RH) linearity 0.99773 under 37.63 0.99846 experimental results showed that has good consistency.Typical tests 75% performed obtain dynamic characteristics.The wavelength drift measured repeatedly,...
Nano/micro satellites in low earth orbit (LEO), and unmanned -aerial-vehicle base stations (UAV-BS) the stratosphere are being considered to be used for increasing coverage provision of on-demand high data rates mobile communication networks all over globe as beyond 5G technology. One most important key technologies such high-speed long-distance is a very accurate time standard, especially LEO constellation [1]. Presently, best accuracy can acquired from atomic clocks. Atomic clock assisted...
A novel high-data-rate low-power spectrum-efficient 60GHz Bi-Phase-On-Off-Keying (BPOOK) transceiver is presented for indoor short-range IoT application targeting the common spectrum mask used in IEEE 802.11ad/ WiGig standards. By employing bi-phase encoder and double-balanced mixer, BPOOK transmitter efficient to be compliant with 2-channel bonding mask. The proposed OOK fabricated 65nm CMOS, achieves 3.0 Gb/s data-rate -46 dBm sensitivity, while consuming a power of 100mW including on-chip...
This paper presents a pulse injected VCO with tail-filter. The proposed architecture aims at the high power efficiency while mitigates potential noise contributors by tail filtering technique. is fabricated in standard 45-nm SOI CMOS technology. At an oscillation frequency of 5GHz, achieves phase -120dBc/Hz 1MHz offset consumes 1.35mW, which corresponds to FoM -191 dBc/Hz.
In order to optimize the orthogonal design of MIMO radar waveform, an improved algorithm based on niche genetic is proposed. The able eliminate individuals with similar structures in population or data, maintain a certain distance between individuals, and effectively hold diversity them It thus eliminates phenomenon premature convergence, strengthens global search ability algorithm, improves its convergence speed. shown that has both advantages overall discover multiple optimal solutions....
The effect of the divacancy defect on magnetic properties Fe94V6 alloys was investigated using first-principles calculations based density functional theory. model Fe28V2 super-lattice for a in alloy established, comparison with perfect Fe30V2 super-lattice. For first time, on-site Coulomb repulsion term considered to correct underestimation bandgap. magnetism Fe, V atoms, and were analyzed by electron hybridization interactions between four different neighboring Fe atoms also investigated....
This paper presents a high performance CMOS VCO with specific design features required for chip scale atomic clock(CSAC). The architecture noise filtering at the current source enables to achieve low power good phase targeted application. Additional PVT frequency compensation is realized mitigate supply induced modulation. has been implemented in standard 65 nm process validation. It achieves of -120 dBc/Hz 1MHz offset while consuming only 0.89 mW flat stability around nominal voltage.
Ecological environmental elements are greatly related to both humans and nature. The rapid development of remote sensing technology has provided us more high-resolution images for monitoring these timely objectively. However, it been a great challenge recognize from such due their diversity complexity. In this paper, classification approach ecological based on deep learning features objects is proposed. At first, convolutional neural network (DCNN) trained discriminating different elements....
This paper presents a high power efficient pulse VCO with tail-filter for the chip-scale atomic clock (CSAC) application. The stringent and stability specifications of next-generation CSAC demand ultra-low consumption low phase noise. proposed architecture aims efficiency, while further reducing noise using tail filtering technique. has been implemented in standard 45nm SOI technology validation. At an oscillation frequency 5.0GHz, achieves -120dBc/Hz at 1MHz offset, consuming 1.35mW....