Elissaios Alexios Papatheofanous

ORCID: 0000-0002-4286-0098
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About
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Research Areas
  • Advanced Photonic Communication Systems
  • Advanced Neural Network Applications
  • Optical Network Technologies
  • Parallel Computing and Optimization Techniques
  • Advanced Optical Network Technologies
  • Interconnection Networks and Systems
  • Embedded Systems Design Techniques
  • CCD and CMOS Imaging Sensors
  • Advanced MIMO Systems Optimization
  • Error Correcting Code Techniques
  • Photovoltaic System Optimization Techniques
  • Numerical Methods and Algorithms
  • Telecommunications and Broadcasting Technologies
  • Neural Networks and Applications
  • Digital Filter Design and Implementation
  • Advanced Memory and Neural Computing
  • Solar Radiation and Photovoltaics
  • Generative Adversarial Networks and Image Synthesis
  • Video Coding and Compression Technologies
  • Brain Tumor Detection and Classification
  • Software-Defined Networks and 5G
  • Adversarial Robustness in Machine Learning
  • Advanced Wireless Communication Technologies
  • Solar Thermal and Photovoltaic Systems
  • Infrared Target Detection Methodologies

National and Kapodistrian University of Athens
2018-2023

University of Surrey
2021

The current work presents the first experimental demonstration of real-time Ethernet (ETH) trial services and 4K-Ultra High Definition (UHD) video application transmission over a 2λ Wavelength Division Multiplexing (WDM) analog Fiber-Wireless (FiWi) mmWave X-haul network, supporting dynamic flexible capacity allocation through an integrated silicon photonic Si <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> N...

10.1109/jlt.2023.3234365 article EN Journal of Lightwave Technology 2023-01-05

The Open Radio Access Network (RAN) concept has been gaining wide acceptance in recent network architectures, including 5G New (NR) deployments. Current RAN radio implementation efforts, aim at integrating several white-box hardware elements and executing digital processing on open-source software. When building such a software-based, platform, challenges include achieving real-time execution times for demanding computational blocks of the NR physical layer processing, as Low Density Parity...

10.1109/access.2021.3127039 article EN cc-by-nc-nd IEEE Access 2021-01-01

The continuing advancement of the neural networks based techniques led to their exploitation in many applications, such as computer vision and natural language processing systems where they provide high accuracy results at cost computational complexity. Hardware implemented AI accelerators needed performance improvement for applications specific areas, including robotics, autonomous internet things. current study presents an FPGA accelerator Convolutional Neural Networks (CNN). CNN model is...

10.1109/patmos.2019.8862166 article EN 2019-07-01

A plethora of image and video-related applications involve complex processes that impose the need for hardware accelerators to achieve real-time performance. Among these, notable include Machine Learning (ML) tasks using Convolutional Neural Networks (CNNs) detect objects in frames. Aiming at contributing CNN accelerator solutions, current paper focuses on design Field-Programmable Gate Arrays (FPGAs) CNNs limited feature space improve performance, power consumption resource utilization. The...

10.3390/jimaging8040114 article EN cc-by Journal of Imaging 2022-04-15

Photovoltaic (PV) power production is characterized by high variability due to short-term meteorological effects such as cloud movements. These have a significant impact on the incident solar irradiance in PV parks. In order control park performance, researchers focused Computer Vision and Deep Learning approaches perform forecasting using sky images. Motivated task of improving control, current work introduces Image Regression Module, which produces values from images image processing...

10.3390/electronics11223794 article EN Electronics 2022-11-18

The advent of computationally demanding algorithms and high data rate instruments in new space applications pushes the industry to explore disruptive solutions for onboard processing. We examine heterogeneous computing architectures involving high-performance low-power commercial SoCs. current paper implements an FPGA with VPU co-processing architecture utilizing CIF & LCD interfaces I/O transfers. A Kintex serves as our framing processor heritage accelerator, while we offload novel DSP/AI...

10.1109/icecs53924.2021.9665462 article EN 2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS) 2021-11-28

Evolving Convolutional Neural Networks (CNNs) and their execution time performance are key factors for a wide range of applications that based on deep learning. The need meeting the applications' constraints led to design AI accelerators current work contributes this effort by presenting CNN two different approaches: a) developing CNNs power efficient System Chip (SoC), Myriad2 b) VHDL application specific corresponding FPGA architecture. Both systems target optimization regarding MNIST...

10.1109/iccairo47923.2019.00030 article EN 2019-05-01

While the realization of 5G has already began, we are also experiencing a paradigm shift towards Open Radio Access Network (RAN) environments. This new promotes open and flexible RAN architectures, which can benefit by physical layer processing being executed on open-source software general purpose processors. However, meeting real-time latency requirements for computationally intensive process Low Density Parity Check (LDPC) Decoding, as defined in 3GPP New (NR), poses challenge such based...

10.1109/meditcom49071.2021.9647697 article EN 2021-09-07

During the past decades reports produced by satellites regarding clouds became important for weather prediction, climate and lately generation distribution of solar power. Image segmentation techniques produce these they exploit convolutional neural networks (CNNs) to improve accuracy results at expense though requirements execution time hardware resources. Aiming improving this trade-off current work studies design a CNN model targeting placement on SoC FPGA while keeping high accuracy....

10.1109/vlsi-soc54400.2022.9939585 article EN 2022-10-03

The ever-increasing demand for computational power and I/O throughput in space applications is transforming the landscape of on-board computing. A variety Commercial-Off-The-Shelf (COTS) accelerators emerges as an attractive solution payload processing to outperform traditional radiation-hardened devices. Towards increasing reliability such COTS accelerators, current paper explores evaluates fault-tolerance techniques Zynq FPGA Myriad VPU, which are two device families being integrated...

10.1109/vlsi-soc54400.2022.9939621 article EN 2022-10-03

This paper presents the end-to-end integration of a software defined network (SDN) reconfigurable real-time analog-intermediate frequency-over-fiber (A-IFoF)/millimeter wave (mmWave) layout into real mobile operator (MNO) infrastructure. The key part presented infrastructure is fully programmable gateway array (FPGA)-based A-IFoF transceiver (TxRx), equipped with active SDN functionalities based on constant monitoring transport link. was successfully evaluated in physical data management and...

10.1364/jocn.490060 article EN Journal of Optical Communications and Networking 2023-07-19

We demonstrate the successful operation of an FPGA-based A-IFoF/mmWave transceiver into existing MNO infrastructure, delivering 4K video streaming and IP-calls over mobile core network. Physical layer connectivity was successfully established, with EVM measurements <10% for QPSK waveforms propagated through different optical-wireless network segments.

10.1109/ecoc52684.2021.9606061 article EN 2021-09-13

The current paper introduces a continuous flow radix-2 FFT architecture with conflict free parallel access in-place technique. parity based technique stores the input elements into two memory banks, and keeps each element at its address through entire process. Moreover, it results in improved generation control circuits compared to hitherto published results. FPGA implementation comparison available cores show advantages of resulting architecture.

10.1109/icecs.2018.8617990 article EN 2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS) 2018-12-01

Beyond 5G networks are expected to distribute the computations from cloud multiple edge nodes, some of which should process both low-level baseband functions and high-level tasks, most notably AI/ML. These computing nodes will demand high-performance, re-programmability, low-power, especially when located at far-edges network. An attractive solution in meeting these needs is utilize highly-complex SoC FPGAs, such as state-of-the-art RFSoC or ACAP devices. As proposed this work towards...

10.1109/meditcom49071.2021.9647576 article EN 2021-09-07
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