A5034441117- Security and Verification in Computing
- Cryptographic Implementations and Security
- Advanced Malware Detection Techniques
- Physical Unclonable Functions (PUFs) and Hardware Security
- Cloud Data Security Solutions
- Network Security and Intrusion Detection
- Information and Cyber Security
- Distributed systems and fault tolerance
- Parallel Computing and Optimization Techniques
- Electrostatic Discharge in Electronics
- Sensor Technology and Measurement Systems
- Privacy, Security, and Data Protection
- Industrial Vision Systems and Defect Detection
- VLSI and Analog Circuit Testing
- Integrated Circuits and Semiconductor Failure Analysis
- Digital and Cyber Forensics
- Coding theory and cryptography
- Chaos-based Image/Signal Encryption
- Advanced Data Storage Technologies
- Vehicular Ad Hoc Networks (VANETs)
- Interconnection Networks and Systems
- Manufacturing Process and Optimization
Télécom Paris
2010-2023
Laboratoire Traitement et Communication de l’Information
2010-2023
Centre National de la Recherche Scientifique
2010-2015
Institut Mines-Télécom
2009-2015
École nationale supérieure de techniques avancées Bretagne
2006-2007
In this paper, we present BCDL (Balanced Cell-based Dual-rail Logic), a new counter-measure against Side Channel Attacks (SCA) on cryptoprocessors implementing symmetrical algorithms FPGA. is DPL (Dual-rail Precharge which aims at overcoming most of the usual vulnerabilities such counter-measures, by using specific synchronization schemes, while maintaining reasonable complexity. We compare our architecture in terms complexity, performances and easiness to design with other DPLs (WDDL,...
In this paper, we present BCDL (Balanced Cell-based Dual-rail Logic), a new counter-measure against Side Channel Attacks (SCA) on cryptoprocessors implementing symmetrical algorithms FPGA. is DPL (Dual-rail Precharge which aims at overcoming most of the usual vulnerabilities such counter-measures, by using specific synchronization schemes, while maintaining reasonable complexity. We compare our architecture in terms complexity, performances and easiness to design with other DPLs (WDDL,...
Several secure computing hardware architectures using memory encryption and integrity checkers have been proposed during the past few years to provide applications with a tamper resistant environment. Some solutions, such as Hide, also solve problem of information leakage on address bus. We propose CryptoPage architecture which implements encryption, protection checking together low performance penalty (3% slowdown average) by combining counter mode operation, local authentication values Merkle trees
Power analysis attacks are non intrusive and easily mounted. As a consequence, there is growing interest in efficient implementation of these against block cipher algorithms such as Data Encryption Standard (DES) Advanced (AES). In our paper we propose new technique based on the Kalman theory. We show how this could be useful for cryptographic domain by making power faster. Moreover prove that filter more powerful than High Order Statistics technique.
The need for security in embedded systems has strongly increased since several years. Nowadays, it is possible to integrate processors a single chip. design of such multiprocessor systems-on-chip (MPSoC) must be done with lot care as the execution applications may lead potential vulnerabilities revelation critical data and private information. Thus becomes mandatory deal issues all along cycle MPSoC order guarantee global protection. Among points, protection communications very sensible most...
The FPGA world recently experienced significant changes with the introduction of new Systems-on-Chip (SoCs) embedding high-end microprocessors and programmable logic on same integrated circuit. architecture these SoCs can be exploited to offer an unprecedented level monitoring memory accesses running software components, a key element performance, safety security analysis. This paper presents hardware / implementation such tracing tool one SoCs. It also proposes example applications in field...
Embedded systems are ubiquitous nowadays. In many cases, they manipulate sensitive applications or data and may be the target of logical physical attacks. On that contain a System-on-Chip connected to an external memory, which is case numerous medium large-size embedded systems, content this memory relatively easy retrieve modify. This attack can performed by probing bus, dumping (cold boot attack) exploiting flaws in DMA-capable devices. Thus, if system manipulates data, confidentiality...
Implementation-level attacks are nowadays well known and most designers of security embedded systems aware them. However, both the number vulnerabilities protections have seriously grown since first public reporting these threats in 1996. It is thus difficult to assess correct countermeasures association cover all possible attack paths. The goal this paper give a clear picture adequation between actually risks mitigation techniques. A specific focus made on two protection techniques...
Computers are widely used and interconnected but not as secure we could expect. For example, a execution cannot even be achieved or proved against software (the system administrator) hardware attacker (a logical analyzer on the computer buses). In this article strong cryptography-based architecture with an operating support is presented to reach such security levels without reducing performance. A cache line cipher memory verifier based MERKLE tree hash function added internal in order...
Cloud Computing is an inevitable trend. In the near future almost every consumer electronic device will be connected to ecosystem of third-party service partners, providing applications like payment systems, streamed content, etc using or producing sensitive data. The challenge is, that current cloud operators and their end users do not always trust each other. This lack limits potential computing market. TRESCCA project aims lay foundations a secure trustable platform, by ensuring strong...
Several secure computing hardware architectures using memory encryption and integrity checkers have been proposed during the past few years to provide applications with a tamper resistant environment. Some solutions, such as HIDE, also solve problem of information leakage on address bus. We propose CRYPTOPAGE architecture which implements encryption, protection checking together low performance penalty (3% slowdown average) by combining Counter Mode operation, local authentication values...
Merkle hash trees are used to protect the integrity of data sets, against all kinds attacks, including replay. They usually imply a significant storage and performance overhead. This paper introduces several proposals (hollow trees, dedicated caches) mitigate these overheads. have been implemented in SecBus, software / hardware architecture protecting external memories System-on-Chip.
The integration of digital devices in modern vehicles has revolutionized automotive technology, enhancing safety and the overall driving experience. Controller Area Network (CAN) bus is a central system for managing in-vehicle communication between electronic control units (ECUs). However, CAN protocol poses security challenges due to inherent vulnerabilities, lacking encryption authentication, which, combined with an expanding attack surface, necessitates robust measures. In response this...
In this paper we introduce a fully non intrusive test method which is based on the Differential Electro-Magnetic Analysis (EMA). Our objective to demonstrate capability of new detect modification in circuit, like fault voluntary injected would be. This detection carried out by comparing reference trace, called Reference Signature, with differential trace representing observed electro-magnetic activity, Control Signature. The results show efficiency proposed method. We will then possibility...
In this paper we introduce a fully non intrusive test method which is based on the Differential Electro-Magnetic Analysis (EMA). Our objective to demonstrate capability of new detect stuck-at-0 faults voluntary injected in full-custom circuit. This detection carried out by comparing reference trace, called Reference Signature, with differential trace representing observed electromagnetic activity. The results show efficiency proposed method. We will then possibility offered EM measurement be...