A5020285271- Cryptographic Implementations and Security
- Physical Unclonable Functions (PUFs) and Hardware Security
- Chaos-based Image/Signal Encryption
- Advanced Malware Detection Techniques
- Cryptography and Residue Arithmetic
- Coding theory and cryptography
- Cryptography and Data Security
- Integrated Circuits and Semiconductor Failure Analysis
- Security and Verification in Computing
- RFID technology advancements
- Advanced Authentication Protocols Security
- Neuroscience and Neural Engineering
- Advanced Memory and Neural Computing
- Smart Grid Security and Resilience
- Parallel Computing and Optimization Techniques
- Embedded Systems Design Techniques
- Biometric Identification and Security
- Digital Media Forensic Detection
- Muscle Physiology and Disorders
- Cell Image Analysis Techniques
- Advanced Steganography and Watermarking Techniques
- User Authentication and Security Systems
- VLSI and Analog Circuit Testing
- Cardiomyopathy and Myosin Studies
- DNA and Biological Computing
University of Electro-Communications
2015-2024
Kobe University
2016
KU Leuven
2006-2011
Meikai University
2009
Tokyo Dental College
2004-2005
University of California, Los Angeles
2003-2004
UCLA Health
2003
RFID (Radio Frequency IDentification) tags need to include security functions, yet at the same time their resources are extremely limited. Moreover, provide privacy, authentication and protection against tracking of without loosing system scalability, a public-key based approach is inevitable, which shown by M. Burmester et al. In this paper, we present an architecture state-of-the-art processor for with Elliptic Curve (EC) over GF(2^163). It shows plausibility meeting both efficiency...
In general, conventional Arbiter-based Physically Unclonable Functions (PUFs) generate responses with low unpredictability. The N-XOR Arbiter PUF, proposed in 2007, is a well-known technique for improving this paper, we propose novel design called Double to enhance the unpredictability on field programmable gate arrays (FPGAs), and compare our PUFs. One metric judging of measure their tolerance machine-learning attacks. Although previous work showed superiority PUFs regarding...
Virtual field‐programmable gate array (FPGA) is an emerging technology to put multiple users in the same FPGA fabric with logical isolation. Security researchers have studied new threats virtual and proposed attacks on isolation by exploiting analogue natures of FPGA. These use oscillator comprising a combinatorial loop access domain using digital components only. Interestingly, system field prohibits design rule check. In this Letter, authors study if prohibiting sufficient thwart...
Arbiter-based Physically Unclonable Function (PUF) is one kind of the delay-based PUFs that use time difference two delay-line signals.One previous work suggests Arbiter implemented on Xilinx Virtex-5 FPGAs generate responses with almost no difference, i.e. low uniqueness.In order to overcome this problem, Double PUF was proposed, which based a novel technique for generating high uniqueness from duplicated FPGAs.It needs same costs as 2-XOR XORs outputs PUFs.Double different in terms mode...
With the growth of Internet Things (IoT) era, protection secret information on IoT devices is becoming increasingly important. For devices, attacks that target leakage through physical side-channels (e.g., a power side-channel) are major threat in many use cases because can be accessed easily by hostile third party. However, securing resource-constrained against side-channel challenging issue. Generally, it difficult to satisfy requirements while maintaining low-power and real-time...
This paper presents a comprehensive analysis of differential fault (DFA) attacks on the Advanced Encryption Standard (AES) from an information-theoretic perspective. Injecting faults into cryptosystems is categorized as active at tack where attackers induce error in operations to retrieve secret internal information, e.g., key ciphers. Here, we consider DFA equivalent special kind passive attack can obtain leaked information without measurement noise. The are regarded conversion process key....
Low uniqueness and vulnerability to machine-learning attacks are known as two major problems of Arbiter-Based Physically Unclonable Function (APUF) implemented on FPGAs. In this paper, we implement Double APUF (DAPUF) that duplicates the original in order overcome problems. From experimental results Xilinx Virtex-5, show DAPUF becomes almost ideal, prediction rate attack decreases from 86% 57%.
This paper presents a reconfigurable curve-based cryptoprocessor that accelerates scalar multiplication of Elliptic Curve Cryptography (ECC) and HyperElliptic (HECC) genus 2 over GF(2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</sup> ). By allocating copies processing cores embed Modular Arithmetic Logic Units (MALUs) ), the ECC/HECC can be accelerated by exploiting Instruction-Level Parallelism (ILP). The supported field size arbitrary up...
The first contribution of our paper is that we propose a platform, design strategy, and evaluation criteria for fair consistent hardware the second-round SHA-3 candidates. Using SASEBO-GII field-programmable gate array (FPGA) board as common combined with well defined software interfaces, compare all 256-bit version candidates respect to area, throughput, latency, power, energy consumption. Our approach defines standard testing harness candidates, including interface specification module on...
Physical Unclonable Functions (PUFs) are expected to represent an important solution for secure ID generation and authentication etc. In general, manufactured PUFs considered be more when the pattern of outputs (the variety responses) is larger, i.e., response bit length longer (e.g., 192-bit than 128-bit one). However, actual reduced because some bits inconsistent (random) repeated measurements, which regarded as unnecessary discarded. Latch-based with $$N$$ RS latches, example, generate...
Laser fault injection (LFI) attack on cryptographic processors is a serious threat to information security. This paper proposes sense-and-react countermeasure against LFI. A distributed bulk-current sensor monitors the abnormal current conduction caused by laser irradiation silicon substrate. The single occupies only 286 F <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /Cell and it across entire core for 100% detection coverage. Upon of...
This paper proposes a new fault-based attack called fault sensitivity analysis (FSA) attack. In the FSA attack, injections are used to test out sensitive information leakage sensitivity. Fault means critical injection intensity that corresponds threshold between devices' normal and abnormal behaviors. We demonstrate without using values of faulty outputs, attackers can obtain secret key based on data-dependency collected data. explains successful attacks against three Advanced Encryption...
In recent years, information systems have become increasingly able to interact with the real world by using relatively cheap connected embedded devices. such systems, sensors are crucial components because can observe only through sensors. Recently, there been emerging threats sensors, which involve injection of false in physical/analog domain. To counter attacks, sensor fusion is considered a promising approach robustness measurement be improved combining data from redundant However,...
We propose a parallel processing crypto-processor for elliptic curve cryptography (ECC) to speed up EC point multiplication. The processor consists of controller that dynamically checks instruction-level parallelism (ILP) and multiple sets modular arithmetic logic units accelerating operations. A case study HW design with the proposed architecture shows multiplication over GF(p) GF(2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">m</sup> ) can...