A5026033503- Physical Unclonable Functions (PUFs) and Hardware Security
- Cryptographic Implementations and Security
- Chaos-based Image/Signal Encryption
- Advanced Malware Detection Techniques
- Semiconductor materials and devices
- Augmented Reality Applications
- Embedded Systems Design Techniques
- Advanced Memory and Neural Computing
- Radiation Effects in Electronics
- EEG and Brain-Computer Interfaces
- Simulation and Modeling Applications
- ECG Monitoring and Analysis
Tokyo Institute of Technology
2020-2024
National Institute of Information and Communications Technology
2020
With the growth of Internet Things (IoT) era, protection secret information on IoT devices is becoming increasingly important. For devices, attacks that target leakage through physical side-channels (e.g., a power side-channel) are major threat in many use cases because can be accessed easily by hostile third party. However, securing resource-constrained against side-channel challenging issue. Generally, it difficult to satisfy requirements while maintaining low-power and real-time...
The rapid development of Internet Things (IoT) has opened new opportunities for healthcare systems through so-called eHealth systems. With the help monitoring using portable IoT devices with biomedical sensors, disease diagnoses can be conducted in real time. However, there is a challenge that an always-on activity requires constant power supply and are battery-powered face heavy resource constraints. This work addresses realistic implementation low-power device both hardware software...
In the Internet of Things (IoT) era, edge devices have been considerably diversified and are often designed using high-level synthesis (HLS) for improved design productivity. However, HLS tools were originally developed in a security-unaware manner, resulting vulnerabilities to power side-channel attacks (PSCAs), which serious threat IoT systems. Currently, impact applicability existing methods PSCA-resistant designs limited. this article, we propose an effective HLS-based method ciphers...
In this paper, four different versions of FPGA-based hardware implementation for Chaskey-12, a lightweight message authentication code algorithm suitable resource-constrained devices, were generated using high-level synthesis (HLS) with optimizations memory and operation parallelization to examine the effects not only on circuit area execution time but also vulnerability power side-channel attacks. Through evaluation Welch's t-test, we disclosed how each optimization would contribute...
In the era of Internet Things (IoT), edge devices are considerably diversified and often designed using high-level synthesis (HLS) to improve design-productivity. A problem here is that HLS tools were originally developed in a security-unaware fashion, inducing vulnerabilities power side-channel attacks (PSCA), which serious threat IoT. Although PSCA induced by recently started be discussed, effects applicability existing methods for PSCA-resistant designs limited so far. this paper, we...
Physical attacks on cryptographic hardware have become a significant threat in recent years. For example, side-channel exploit information leakage, such as power consumption or processing time during encryption, to recover the secret key. Threshold implementation (TI) is widely-used countermeasure against attacks. In conventional of TI, process for ensuring an important property called uniformity refreshing, which re-masks intermediate values using many random bits. this study, we...