Wanyeong Jung

ORCID: 0000-0002-5671-1341
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About
Contact & Profiles
Research Areas
  • Analog and Mixed-Signal Circuit Design
  • Low-power high-performance VLSI design
  • Advanced Memory and Neural Computing
  • Energy Harvesting in Wireless Networks
  • Advanced DC-DC Converters
  • Advancements in Semiconductor Devices and Circuit Design
  • Semiconductor materials and devices
  • CCD and CMOS Imaging Sensors
  • Analytical Chemistry and Sensors
  • Advanced Battery Technologies Research
  • Sensor Technology and Measurement Systems
  • Wireless Power Transfer Systems
  • Fluid Dynamics and Turbulent Flows
  • Innovative Energy Harvesting Technologies
  • Wind and Air Flow Studies
  • Photonic and Optical Devices
  • Advanced MEMS and NEMS Technologies
  • RFID technology advancements
  • Parallel Computing and Optimization Techniques
  • Advancements in PLL and VCO Technologies
  • Neuroscience and Neural Engineering
  • Radio Frequency Integrated Circuit Design
  • Fluid Dynamics and Vibration Analysis
  • Silicon Carbide Semiconductor Technologies
  • Advanced Sensor and Energy Harvesting Materials

Korea Advanced Institute of Science and Technology
2020-2025

Kootenay Association for Science & Technology
2020

Massachusetts Institute of Technology
2020

University of Michigan
1992-2018

SK Group (South Korea)
2018

The response of wall-flow turbulence to high-frequency spanwise oscillations was investigated by direct numerical simulations a planar channel flow subjected either an oscillatory cross-flow or the motion wall. Periods oscillation, Tosc+=Toscuτ2/ν, ranging from 25 500 were studied. For 25≤Tosc+≤200 turbulent bursting process suppressed, leading sustained reductions 10% 40% in drag and comparable attenuations all three components intensities as well Reynolds shear stress. Oscillations at...

10.1063/1.858381 article EN Physics of Fluids A Fluid Dynamics 1992-08-01

This paper presents a fully integrated energy harvester that maintains >35% end-to-end efficiency when harvesting from 0.84 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> solar cell in low light condition of 260 lux, converting 7 nW input power 250 mV to 4 V. Newly proposed self-oscillating switched-capacitor (SC) DC-DC voltage doublers are cascaded form complete harvester, with configurable overall conversion ratio 9× 23×. In each...

10.1109/jssc.2014.2346788 article EN IEEE Journal of Solid-State Circuits 2014-08-29

The Internet of Things (IoT) is a rapidly emerging application space, poised to become the largest electronics market for semiconductor industry. IoT devices are focused on sensing and actuating our physical environment have nearly unlimited breadth uses. In this paper, we explore space then identify two common challenges that exist across space: ultra-low power operation system design using modular, composable components. We survey recent low techniques discuss bus enables modular design....

10.1109/vlsit.2014.6894411 article EN 2014-06-01

Thermal sensing is one of the most commonly desired features in IoT devices to monitor either environmental or system/chip conditions. An accurate temperature sensor usually requires carefully calibrated, high-accuracy ADCs, which prevents their use ultra-low-power nodes. In some architectures, a highly timing reference can replace ADC [1]. With this mind, we observe that almost all systems incorporate source (real-time clock, RTC) for time synchronization, data recording, and radio...

10.1109/isscc.2017.7870310 article EN 2022 IEEE International Solid- State Circuits Conference (ISSCC) 2017-02-01

Recent advances in low-power circuits have enabled mm-scale wireless systems [1] for sensor networks and implantable devices, among other applications. Energy harvesting is an attractive way to power such due limited energy capacity of batteries at these form factors. However, the same size limitation restricts amount harvested power, which can be as low 10s nW photovoltaic cells indoor conditions. Efficient DC-DC up-conversion levels (for battery charging) extremely challenging has not yet...

10.1109/isscc.2014.6757486 article EN 2014-02-01

Capacitance sensors are widely used to measure various physical quantities, including position, pressure, and concentration of certain chemicals [1-6]. Integrating capacitive into a small wireless sensor system is challenging due their large power consumption relative the total power/energy budget, which can be as low few nW [4]. Typical capacitance-to-digital converters (CDCs) use charge sharing or transfer between capacitors convert sampled capacitance voltage, then measured with an ADC...

10.1109/isscc.2015.7063137 article EN 2015-02-01

A dual-slope capacitance-to-digital converter for pressure-sensing is presented and demonstrated in a complete microsystem. The design uses base capacitance subtraction with configurable capacitor bank to narrow down input range reduce conversion time. An energy-efficient iterative charge method proposed, employing current mirror that leverages the 3.6 V battery supply available system. We also propose dual-precision comparators comparator power while maintaining high accuracy during slope...

10.1109/jssc.2015.2435736 article EN IEEE Journal of Solid-State Circuits 2015-06-11

This paper presents a new energy-efficient ring oscillator collapse-based comparator, named edge-pursuit comparator (EPC). automatically adjusts the performance by changing comparison energy according to its input difference without any control, eliminating unnecessary spent on coarse comparisons. Furthermore, detailed analysis of EPC in phase domain shows improved efficiency over conventional comparators even scaling, and wider resolution tuning capability with small load capacitance area....

10.1109/jssc.2016.2631299 article EN IEEE Journal of Solid-State Circuits 2017-01-17

An incremental zoom-in capacitance-to-digital converter (CDC) is proposed. By using a 9b SAR, the OSR can be reduced to only 32, significantly improving conversion energy. We show how OTA in SAR bypassed for CDC further reducing energy and propose novel matrix based 512-element unit-cap structure dynamic element matching. The achieves 94.7dB SNR 33.7µW power consumption with 175fJ/conv-step at 1.4V supply.

10.1109/vlsic.2014.6858443 article EN 2014-06-01

Near-threshold computing (NTC) is an attractive solution to stagnating energy efficiencies in digital integrated circuits, arising from slowed voltage scaling nanometer CMOS [1-2]. The design of sequential elements for NTC, as well voltage-scaled systems operating at both near-threshold and super-threshold, has not been extensively studied. However, it known that have a strong sensitivity process variations NTC [2], which can significant impact on system yield power consumption. In order...

10.1109/isscc.2014.6757516 article EN 2014-02-01

Switched-capacitor (SC) DC-DC converters have several advantages over inductive in that they are easily integrated on-chip and can scale to desired power levels, rendering themselves promising for voltage regulators, especially small, low-power systems. However, many SC offer only a few conversion ratios, limiting their use systems which either the input or output voltages vary. This is particularly important wireless where battery degrades slowly. [1] proposed technique reconfigure cascaded...

10.1109/isscc.2016.7417985 article EN 2022 IEEE International Solid- State Circuits Conference (ISSCC) 2016-01-01

As Internet-of-Things (IoT) systems proliferate, there is a greater demand for small and efficient power management units. Fully integrated switched-capacitor (SC) DC-DC converters are promising candidates due to their form factor low quiescent power, aided by dynamic activity scaling [1-3]. However, they offer limited number of conversion ratios, making them challenging use in actual since often require multiple output voltages (to reduce consumption) various input sources maximize...

10.1109/isscc.2016.7417953 article EN 2022 IEEE International Solid- State Circuits Conference (ISSCC) 2016-01-01

We present an 8-bit sub-ranging SAR ADC designed for bursty signals having long time periods with small code spread. A modified capacitive-DAC (CDAC) saves previous sample's MSB voltage and reuses it throughout subsequent conversions. This prevents unnecessary switching of large capacitors as well conversion cycles, reducing energy consumed in the comparator digital logic yielding total savings 2.6×. In 0.18μm CMOS, consumes 120nW at 0.6V 100kS/s 46.9dB SNDR.

10.1109/vlsic.2015.7231327 article EN 2015-06-01

This paper presents a new energy-efficient ring oscillator collapse-based comparator, which is demonstrated in 15-bit SAR ADC. The comparator automatically adjusts comparison energy according to its input difference without any control, eliminating unnecessary spent on coarse comparisons. employed ADC supplements 10-bit differential main CDAC with 5-bit common-mode CDAC. offers an additional 5 bits of resolution common mode gain tuning that improves linearity by reducing the effect switch...

10.1109/vlsic.2016.7573518 article EN 2016-06-01

This article presents an ultra-small, high-security identification tag that is entirely built in a CMOS chip without external components. The usage of backscatter communications at 260 GHz enables full integration 2 × patch antenna array. For compactness and minimum interference caused by direct wave reflection, the signal frequency-shifted MHz radiated with cross polarization from same Such configuration also, for first time RF tags, beamsteering enhanced link budget. authentication secure...

10.1109/jssc.2020.3015717 article EN publisher-specific-oa IEEE Journal of Solid-State Circuits 2020-08-24

The boom of connected Internet Things (IoT) nodes and ubiquity wireless communications are projected to increase data traffic by several orders magnitude in the near future. While these future scalable networks support increasing numbers devices utilizing electromagnetic (EM) spectrum, ensuring security sensing is also a critical requirement. Wirelessly sensor transmit collect private sensitive data, e.g., health-related or financial information, that must be communicated securely over air.

10.1109/mssc.2020.3021842 article EN IEEE Solid-State Circuits Magazine 2020-01-01

This brief presents a redundant-transition-free low-power flip-flop (FF), named contention-free change-sensing FF (C2SFF). The instability of previous circuit has been discovered under test scenario where the data input change is uncorrelated with clock signal. By resolving this instability, C2SFF always and low leakage, while maintaining dynamic power by eliminating unnecessary transitions internal clocked nodes. Without additional sizing efforts, operates reliably down to 0.32V removing...

10.1109/tcsii.2024.3377714 article EN IEEE Transactions on Circuits & Systems II Express Briefs 2024-03-18

Energy-autonomous wireless tags have been adopted in authentication and supply-chain management. At present, their size cost, limited by packaging, prevent the tagging for small or inexpensive industrial/medical components. same time, pervasive electronic raises serious privacy concerns related to inadvertent malicious tracking of tagged assets. In order enable secure ubiquitous asset tagging, fully passive particle-sized cryptographic chips without external packaging are highly desired....

10.1109/isscc19947.2020.9063068 article EN 2022 IEEE International Solid- State Circuits Conference (ISSCC) 2020-02-01

We developed a nanoimprint lithography (NIL) technology including NIL system, template and resist process for half pitch (hp) 14 nm direct pattering. The latest system NZ2C shows the mix match overlay (MMO) of 3.4 ( 3σ) life around 125 lots. Throughput 80 wafers per hour (wph) was demonstrated using throughput enhancement solutions, such as gas permeable spin-on-carbon (GP-SOC) multi field dispense (MFD). hp fabricated by self-aligned double patterning (SADP) on template. Using this...

10.1109/iedm.2018.8614578 article EN 2021 IEEE International Electron Devices Meeting (IEDM) 2018-12-01

This letter presents a SAR temperature sensor using clocked temperature-voltage comparator. The comparator is designed to have PTAT input offset voltage, which quantized by SAR. Temperature transduction spatially and temporally confined in the comparatorfs dynamic comparison. Other circuit operations are robust changes so that sensorfs measurement range can be maximized. Also, inherits many good aspects of ADC, such as simple design operation, no need for complex digital filtering, low...

10.1109/lssc.2023.3266437 article EN IEEE Solid-State Circuits Letters 2023-01-01

Owing to their high efficiency and power density, hybrid dc–dc converters are gaining attention in academia industry. However, no systematic procedure is currently available for creating new converter topologies where the number of inductors capacitors different. This articles proposes ConverGenT, an automated topological synthesis analysis framework two-phase with one inductor two consisting flying output capacitor. Consequently, all this type discovered. In contrast conventional approach...

10.1109/tpel.2023.3285548 article EN IEEE Transactions on Power Electronics 2023-06-13
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