- Advancements in Semiconductor Devices and Circuit Design
- Semiconductor materials and devices
- Nanowire Synthesis and Applications
- Integrated Circuits and Semiconductor Failure Analysis
- Silicon Carbide Semiconductor Technologies
- Ferroelectric and Negative Capacitance Devices
- GaN-based semiconductor devices and materials
- solar cell performance optimization
- Semiconductor Quantum Structures and Devices
- Transition Metal Oxide Nanomaterials
- Spectroscopy and Laser Applications
- Gas Sensing Nanomaterials and Sensors
- Conducting polymers and applications
- Photonic and Optical Devices
- Plasmonic and Surface Plasmon Research
- Iterative Learning Control Systems
- Terahertz technology and applications
- Electrostatic Discharge in Electronics
- Graphene research and applications
- Chalcogenide Semiconductor Thin Films
- Advanced biosensing and bioanalysis techniques
- Force Microscopy Techniques and Applications
- Gold and Silver Nanoparticles Synthesis and Applications
- Photovoltaic System Optimization Techniques
- Superconducting and THz Device Technology
Government of Mizoram
2019-2025
Maulana Azad National Institute of Technology
2017-2025
Mizoram University
2022-2024
National Institute of Technology
2018-2023
Trench (Germany)
2022
University of Waterloo
2011-2019
University of Alberta
2015-2019
Newcastle University
2019
Chandigarh University
2019
Canadian Natural Resources
2015-2017
This work proposes a unique design of charge plasma based junctionless SiGE source TFET with dual cavity and ferroelectric gate dielectric. The biosensor works on the principle dielectric modulation for label-free detection, where lies under metal just around tunneling junction TFET. Nanocavity above regions act as reservoir biomolecules (to be detected) junction, letting drain current modulate. Cavity dimensions its placement have been optimized to achieve better sensitivity. Dual...
The incubation of strained nano-system in the form tri-layered structure as nanowire channel cylindrical-gate-all-around (CGAA) FET at 10 nm gate length is developed for first time to keep abreast with proposed 3 technology node IRDS 2022. system installs Type-II hetero-strain alignment attesting itself fastest operating device debasing SCEs nano regime. ultra-thin strained-channel comprises two cylindrical s-Si wells encompassing s-SiGe barrier between, which enables improvement carrier...
Density functional theory (DFT) calculations are performed on the newly developed and designed photosensitizers having [D-D-triad-A]- [D−π–π–A]-type structural models for near-infrared absorption dye-sensitized solar cells (DSSCs). For this purpose, three novel molecules designed, which named as follows: [naphthalene-anthracene-thiophene-furan-benzonitrile] dye S1, [coronene-anthracene-thiophene-furan-benzonitrile] S2, [fluorene-thiophene-furan-benzonitrile] S3. In all systems, benzonitrile...
Abstract Planar copper phthalocyanine (CuPc)/C 60 heterojunction solar cells with a 2 nm layer of bathocuproine (BCP) inserted into the C were fabricated and characterized. The BCP in devices was used as an electronically selective sieve allowing electron current through but blocking excitons layer. By combining experimental results optical modeling, effective triplet exciton diffusion length confirmed to be 30–35 under device working condition. We demonstrate simple, useful method determine...
The external performance of quantum optoelectronic devices is governed by the spatial profiles electrons and potentials within active regions these devices. For example, in cascade lasers (QCLs), electric field domain (EFD) hypothesis posits that potential distribution might be simultaneously spatially nonuniform temporally unstable. Unfortunately, there exists no prior means probing inner profile directly. Here we report nanoscale measured inside operating QCLs using scanning voltage...
Incubation of strain technology in the Metal Oxide Semiconductor Field Effect Transistor (MOSFET) arena by developing heterostructure layers combined Si and SiGe within channel is employed widely. Development a fully depleted novel device featuring distinguished tri‐layer consisting mobility enriched double strained (s‐Si) sandwiching (s‐SiGe) between has been crux this paper. The with s‐Si/s‐SiGe/s‐Si significantly enhances electron comparison to conventional s‐Si on relaxed channel,...
Comparative studies of the 2D numerical modelling and simulation graphene-based gallium arsenide silicon Schottky junction solar cell are studied using TCAD tools. The performance photovoltaic cells was examined while taking parameters, such as substrate thickness, relationship between transmittance work function graphene, n-type doing concentration semiconduction. area with highest efficiency for photogenerated carriers found to be located near interface region under light illumination....
A Schottky barrier high-electron-mobility avalanche transit time (HEM-ATT) structure is proposed for terahertz (THz) wave generation. The laterally oriented and based on AlGaN/GaN two-dimensional electron gas (2-DEG). Trenches are introduced at different positions of the top AlGaN layer realizing sheet carrier density profiles 2-DEG channel; resulting devices equivalent to high–low, low–high low-high–low quasi-Read structures. DC, large-signal noise simulations HEM-ATTs were carried out...
This research explores a comprehensive examination of gate underlap incorporated strained channel Cylindrical Gate All Around Nanowire FET having enriched performances above the requirement 2 nm technology node IRDS 2025. The device installs combination strain engineering based quantum well barrier system in region with high-k spacers sandwiching underlaps and stack gate-oxide. are prone to parasitic resistance various short effects (SCEs) hence, sandwiched by HfO
Multi-gate field effect transistors (FETs) such as FinFETs are severely affected by short-channel effects (SCEs) below 14 nm technology nodes, with even taller fins incurring fringing capacitances. This leads to performance degradation of the devices, which inhibits further scaling nanoFETs, deterring progress semiconductor industries. Therefore, research has not kept pace technological requirements International Roadmap for Devices and Systems (IRDS). Thus, development newer devices...
The recent developments in the replacement of bulk MOSFETs with high-performance semiconductor devices create new opportunities attaining best device configuration drive current, leakage subthreshold swing, Drain-Induced Barrier Lowering (DIBL), and other short-channel effect (SCE) parameters. Now, multigate FETs (FinFET tri-gate (TG)) are advanced methodologies to continue scaling devices. Also, strain technology is used gain a higher current drive, which raises performance, high-k...
The device dimension down scaling beyond 14 nm technology node utilization of architecture and new materials is a need the semiconductors industry. In this paper, three materials, <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1-x</sub> Ga xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> As/ GaxP, GAA JL FET developed analyzed for their analog performance at high temperature. As has composition 53% InAs 47% GaAs with band gap 0.75 eV, whereas...