Rapid progress in the physical implementation of quantum computers gave birth to multiple recent machines implemented with superconducting technology. In these NISQ machines, each qubit is physically connected a bounded number neighbors. This limitation prevents most programs from being directly executed on devices. A compiler required for converting program hardware-compliant circuit, particular, making two-qubit gate executable by mapping two logical qubits link between them. To solve this...

Quantum measurement is important to quantum computing as it extracts out the outcome of circuit at end computation. Previously, all measurements have be done circuit. Otherwise, will incur significant errors. But not case now. Recently IBM starts supporting dynamic through hardware (instead software by simulator). With mid-circuit measurement, we can improve efficacy and fidelity from three aspects: (a) reduced qubit usage, (b) swap insertion, (c) improved fidelity. We demonstrate this using...

Graph edge partition models have recently become an appealing alternative to graph vertex for distributed computing due both their flexibility in balancing loads and performance reducing communication cost.

Quantum computers can solve problems that are intractable using the most powerful classical computer. However, qubits fickle and error prone. It is necessary to actively correct errors in execution of a quantum circuit. correction (QEC) codes developed enable fault-tolerant computing. With QEC, one logical circuit converted into an encoded

Near-term intermediate-scale quantum (NISQ) devices are subject to considerable noise and short coherence time. Consequently, it is critical minimize circuit execution latency improve fidelity. Traditionally, each basis gate of a transpiled decoded into fixed episode the device control pulses. Recent studies investigate merged pulse generation method for customized gates through optimal (QOC). In this work, we propose PAQOC, novel QOC framework that can (i) exploit an augmented program-aware...

Graph edge partition models have recently become an appealing alternative to graph vertex for distributed computing due their flexibility in balancing loads and performance reducing communication cost [6, 16]. In this paper, we propose a simple yet effective partitioning algorithm. practice, our algorithm provides good quality (and better than similar state-of-the-art approaches, at least power-law graphs) while maintaining low overhead. theory, previous work [6] showed that approximation...

A critical feature in today's quantum circuit is that they have permutable two-qubit operators. The flexibility ordering the gates leads to more compiler optimization opportunities. However, it also imposes significant challenges due additional degree of freedom. Our Contributions are two-fold. We first propose a general methodology can find structured solutions for scalable hardware. It breaks down complex compilation problem into two sub-problems be solved at small scale. Second, we show...

The rapid progress of physical implementation quantum computers paved the way realising design tools to help users write programs for any given devices. constraints inherent current NISQ architectures prevent most algorithms from being directly executed on To enable two-qubit gates in algorithm, existing works focus inserting SWAP dynamically remap logical qubits qubits. However, their schemes lack consideration depth generated circuits. In this work, we propose a depth-aware insertion...

Quantum measurement is important to quantum computing as it extracts the outcome of circuit at end computation. Previously, all measurements have be done circuit. Otherwise, will incur significant errors. But not case now. Recently IBM started supporting dynamic circuits through hardware (instead software by simulator). With mid-circuit measurement, we can improve efficacy and fidelity from three aspects: (a) reduced qubit usage, (b) swap insertion, (c) improved fidelity. We demonstrate this...

Graph edge partition models have recently become an appealing alternative to graph vertex for distributed computing due both their flexibility in balancing loads and performance reducing communication cost. In this paper, we propose a simple yet effective partitioning algorithm. practice, our algorithm provides good quality while maintaining low overhead. It also outperforms similar state-of-the-art approaches, especially power-law graphs. theory, previous work showed that approximation...

NVIDIA's software does not offer translation of assembly code to binary for their GPUs, since the specifications are closed-source. This work fills that gap. We develop a systematic method decoding Instruction Set Architectures (ISAs) and generating assemblers different generations GPUs. Our framework enables cross-architecture analysis transformation. Making ISA accessible in this manner opens up world opportunities developers researchers, enabling numerous optimizations explorations...

The rapid progress of physical implementation quantum computers paved the way for design tools to help users write programs any given device. constraints inherent in current NISQ architectures prevent most algorithms from being directly executed on devices. To enable two-qubit gates algorithm, existing works focus inserting SWAP dynamically remap logical qubits qubits. However, their schemes lack consideration execution time generated circuits. In this work, we propose a slack-aware...

Software-defined networking (SDN) provides a new network architecture by decoupling control and data planes. By performing the tasks of plane in centralized manner, SDN enables capability programmability flexibility to fulfill various types applications. The planes also brings additional messaging overhead latency degrade efficiency flow statistics collection, but timely accurate are critical for numerous In this article, we propose an effective scheme, <italic...

Because of the success wired network, protocols proposed for MANETs in past are based on shortest path algorithm such as AODV or DSR. Although it brings better data transmission bauds, various conditions might cause different problems. For example, usually run limited power supply. Therefore, if they communicate using algorithm, then consumption will centralize specific nodes and network disconnected an earlier stage. To stabilize MANETs, recent researches consider two major measures: one is...

Near-term quantum systems tend to be noisy. Crosstalk noise has been recognized as one of several major types noises in superconducting Noisy Intermediate-Scale Quantum (NISQ) devices. arises from the concurrent execution two-qubit gates on nearby qubits, such \texttt{CX}. It might significantly raise error rate comparison running them individually. can mitigated through scheduling or hardware machine tuning. Prior scientific studies, however, manage crosstalk at a really late phase...

The TCP protocol is a connection-oriented and reliable transport layer communication which widely used in network communication. With the rapid development popular application of data center networks, high-throughput, low-latency, multi-session processing has become an immediate need for devices. If only traditional software stack processing, it will occupy large amount CPU resources affect performance. To address above issues, this paper proposes double-queue storage structure 10G TCP/IP...

Quantum computing has shown promise in solving complex problems by leveraging the principles of superposition and entanglement. The Variational Eigensolver (VQE) algorithm stands as a pivotal approach realm quantum algorithms, enabling simulation systems on hardware. In this paper, we introduce two innovative techniques, namely "Tetris" "Fast Bridging," designed to enhance efficiency effectiveness VQE tasks. technique addresses crucial aspect optimization unveiling cancellation opportunities...

Quantum Approximation Optimization Algorithm (QAOA) is a highly advocated variational algorithm for solving the combinatorial optimization problem. One critical feature in quantum circuit of QAOA that it consists two-qubit operators commute. The flexibility reordering gates allows compiler optimizations to generate circuits with better depths, gate count, and fidelity. However, also imposes significant challenges due additional freedom exposed compilation. Prior studies lack following: (1)...

NVIDIA’s software does not offer translation of assembly code to binary for their GPUs, since the specifications are closed-source. This work fills that gap. We develop a systematic method decoding Instruction Set Architectures (ISAs) and generating assemblers different generations GPUs. Our framework enables cross-architecture analysis transformation. Making ISA accessible in this manner opens up world opportunities developers researchers, enabling numerous optimizations explorations...

Notice of Violation IEEE Publication Principles<br><br>"Calculus-based Runtime Verification"<br>by Benzhai Hai, Fangfang Li, Ruiyun Xie, Yanhao Chen<br>in the 2010 3rd International Conference on Computer Science and Information Technology (ICCSIT), 2010, pp. 271 – 275<br><br>After careful considered review content authorship this paper by a duly constituted expert committee, has been found to be in violation IEEE's Principles.<br><br>This contains significant portions original text from...

Priority queue, often implemented as a heap, is an abstract data type that has been used in many well-known applications like Dijkstra's shortest path algorithm, Prim's minimum spanning tree, Huffman encoding, and the branch-and-bound algorithm. However, it challenging to exploit parallelism of heap on GPUs since control divergence memory irregularity must be taken into account. In this paper, we present parallel generalized model works effectively GPUs. We also prove linearizability our...

Programming today's many-core processor is challenging. Due to the enormous amount of parallelism, synchronization expensive. We need efficient data structures for providing automatic and scalable methods. In this paper, we focus on priority queue structure. develop a heap-based implementation called BGPQ. BGPQ uses batched key nodes as internal representation, exploits both task parallelism linearizable. show that achieves up 88X speedup compared with four state-of-the-art CPU parallel...