A5100458165- Quantum Computing Algorithms and Architecture
- Quantum Information and Cryptography
- Parallel Computing and Optimization Techniques
- Semiconductor materials and devices
- Computability, Logic, AI Algorithms
- Advancements in Semiconductor Devices and Circuit Design
- Radiation Effects in Electronics
- Advanced Data Storage Technologies
- Low-power high-performance VLSI design
- Integrated Circuits and Semiconductor Failure Analysis
- Cardiovascular Health and Disease Prevention
- Algorithms and Data Compression
- Evolutionary Algorithms and Applications
- Advanced Image and Video Retrieval Techniques
- Software Testing and Debugging Techniques
- Quantum and electron transport phenomena
- Quantum-Dot Cellular Automata
- Neural Networks and Applications
- Silicon Carbide Semiconductor Technologies
- ECG Monitoring and Analysis
- Cloud Computing and Resource Management
- Rough Sets and Fuzzy Logic
- Quantum Mechanics and Applications
- Reinforcement Learning in Robotics
- Recommender Systems and Techniques
Film Independent
2024
University of Science and Technology of China
2023-2024
ETH Zurich
2023-2024
University of Pittsburgh
2018-2023
University of Exeter
2023
University of California, Los Angeles
2021
Vanderbilt University
2011-2017
Columbia University
2010-2012
Rapid progress in the physical implementation of quantum computers gave birth to multiple recent machines implemented with superconducting technology. In these NISQ machines, each qubit is physically connected a bounded number neighbors. This limitation prevents most programs from being directly executed on devices. A compiler required for converting program hardware-compliant circuit, particular, making two-qubit gate executable by mapping two logical qubits link between them. To solve this...
We present experimental evidence of single-event upsets in 28 and 45 nm CMOS SRAMs produced by single energetic electrons. Upsets are observed within 10% nominal supply voltage for devices built the technology node. Simulation results provide supporting that electrons generated incident X-rays. The errors shown not to be result "weak bits" or photocurrents resulting from collective energy deposition Experimental consistent with bias sensitivity critical charge direct ionization effects...
Nonadiabatic geometric quantum computation (NGQC) has attracted a lot of attention for noise-resilient control. However, previous implementations NGQC require long evolution paths that make them more vulnerable to incoherent errors than their dynamical counterparts. In this work, we experimentally realize universal short-path nonadiabatic gate set (SP NGQC) with 2-times shorter path on superconducting processor. Characterizing both process tomography and randomized benchmarking methods,...
Quantum computers can solve problems that are intractable using the most powerful classical computer. However, qubits fickle and error prone. It is necessary to actively correct errors in execution of a quantum circuit. correction (QEC) codes developed enable fault-tolerant computing. With QEC, one logical circuit converted into an encoded
Quantum mechanical-based kinetic Monte-Carlo calculations (KMC) are used to investigate mechanisms of degradation graphene devices subjected 10-keV x-ray irradiation, ozone exposure, and subsequent high-temperature annealing. Using KMC, we monitor the time evolution defect concentrations on a surface. The mechanism for oxygen exposure anneal surface greatly depends temperature initial H O atoms At coverage ~0.05 higher, damage is caused by formation vacancies due desorption CO <sub...
We demonstrate that, by monitoring source and drain currents during alternating-current gate pulses, reliable estimates of radiation-induced interface-trap density can be obtained for conventional floating-body SOI FinFETs without body contacts. Estimates effective densities are shown two development stage technologies, before irradiation, doses up to 1 Mrad(SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> ). Straightforward these...
The vulnerability of deep neural networks (DNNs) to input perturbations has posed a significant challenge. Recent work on robustness verification DNNs not only lacks scalability but also requires severe restrictions the architecture (layers, activation functions, etc.). To address these limitations, we propose novel framework, SORA, for scalable blackbox reachability analysis DNNs. SORA can broad class network structures, including those with very layers and huge number neurons nonlinear...
We report two types of memristive devices made ZnO nanowire assemblies and Ag electrodes: nanowire-bundle nanowire-mesh memristors. Although constructed with the same materials, these exhibit different characteristics. Nanowire-bundle memristors have small On/Off ratios feature stable hysteresis under X-ray irradiation. Nanowire-mesh show large multiple distinct states. attribute switching in bundle nanowires to modification Schottky barrier by mobile ions stability ability bundles retain...
In this research paper, our primary focus revolves around the domain-specific hardware mapping strategy tailored for Quantum Fourier Transformation (QFT) circuits. While previous approaches have heavily relied on SAT solvers or heuristic methods to generate hardware-compatible QFT circuits by inserting SWAP gates realign logical qubits with physical at various stages, they encountered significant challenges. These challenges include extended compilation times due expansive search space and...
A critical feature in today's quantum circuit is that they have permutable two-qubit operators. The flexibility ordering the gates leads to more compiler optimization opportunities. However, it also imposes significant challenges due additional degree of freedom. Our Contributions are two-fold. We first propose a general methodology can find structured solutions for scalable hardware. It breaks down complex compilation problem into two sub-problems be solved at small scale. Second, we show...
The rapid progress of physical implementation quantum computers paved the way realising design tools to help users write programs for any given devices. constraints inherent current NISQ architectures prevent most algorithms from being directly executed on To enable two-qubit gates in algorithm, existing works focus inserting SWAP dynamically remap logical qubits qubits. However, their schemes lack consideration depth generated circuits. In this work, we propose a depth-aware insertion...
The rapid progress of physical implementation quantum computers paved the way for design tools to help users write programs any given device. constraints inherent in current NISQ architectures prevent most algorithms from being directly executed on devices. To enable two-qubit gates algorithm, existing works focus inserting SWAP dynamically remap logical qubits qubits. However, their schemes lack consideration execution time generated circuits. In this work, we propose a slack-aware...
Data-intensive applications involving irregular memory streams are inefficiently handled by modern processors and systems highly optimized for regular, contiguous data. Recent work tackles these inefficiencies in hardware through core-side stream extensions or memory-side prefetchers accelerators, but fails to provide end-to-end solutions which also achieve high efficiency on-chip interconnects. We propose AXI-Pack, an extension ARM's AXI4 protocol introducing bandwidth-efficient strided...
Near-term quantum systems tend to be noisy. Crosstalk noise has been recognized as one of several major types noises in superconducting Noisy Intermediate-Scale Quantum (NISQ) devices. arises from the concurrent execution two-qubit gates on nearby qubits, such \texttt{CX}. It might significantly raise error rate comparison running them individually. can mitigated through scheduling or hardware machine tuning. Prior scientific studies, however, manage crosstalk at a really late phase...
Rapid development in quantum computing leads to the appearance of several applications. Quantum Fourier Transformation (QFT) sits at heart many these Existing work leverages SAT solver or heuristics generate a hardware-compliant circuit for QFT by inserting SWAP gates remap logical qubits physical qubits. However, they might face problems such as long compilation time due huge search space suboptimal outcome terms number cycles finish all gate operations. In this paper, we propose...
We study the efficiency of algorithms simulating a system evolving with Hamiltonian $H=\sum_{j=1}^m H_j$. consider high order splitting methods that play key role in quantum simulation. obtain upper bounds on number exponentials required to approximate $e^{-iHt}$ error $\e$. Moreover, we derive method optimizes cost resulting algorithm. show significant speedups relative previously known results.
We have evaluated the effects of device geometry and frequency on DCIV ACIV (charge pumping) currents in development-stage SOI finFETs with floating bodies that are built two process technologies. Both much smaller devices for which gate length exceeds ~100 nm or fin width ~70 nm. approximately linear up to ~300 kHz measurement conditions used this study. estimates effective interface-trap densities relatively short-channel, narrow-fin each technology ~4 × 10 11 cm -2 .
In this paper, we present a new algorithm for generic combinatorial optimization, which term quantum dueling. Traditionally, potential solutions to the given optimization problems were encoded in ``register'' of qubits. Various techniques are used increase probability finding best solution upon measurement. Quantum dueling innovates by integrating an additional qubit register, effectively creating ``dueling'' scenario where two sets compete. This dual-register setup allows dynamic...