A5029494737- Quantum Computing Algorithms and Architecture
- Machine Learning in Materials Science
- Error Correcting Code Techniques
- Parallel Computing and Optimization Techniques
- DNA and Biological Computing
- Data Mining Algorithms and Applications
- Embedded Systems Design Techniques
- Algorithms and Data Compression
- Data Stream Mining Techniques
- Advanced Image and Video Retrieval Techniques
- VLSI and FPGA Design Techniques
- Quantum-Dot Cellular Automata
- Video Analysis and Summarization
- Cellular Automata and Applications
- Optimization and Packing Problems
- Low-power high-performance VLSI design
- Network Security and Intrusion Detection
Hitachi (Japan)
2020-2021
Hokkaido University
2016-2020
This article presents a high-performance annealing processor named STochAsTIc Cellular automata Annealer (STATICA) for solving combinatorial optimization problems represented by fully connected graphs. Supporting graphs is strongly required dealing with realistic problems. Unlike previous processors that follow Glauber dynamics, our proposed annealer can update multiple states of spins simultaneously introducing different dynamics called stochastic cellular annealing. It allows us to utilize...
Combinatorial optimization problems ubiquitously appear in AI applications, e.g. machine learning, operational planning, drug discovery, etc. Yet, their NP-hardness makes them notoriously difficult to solve on present computers. To address this problem, new hardware architectures [1, 4], called annealers, have emerged recent years. Annealers exploit the fact that combinatorial can be mapped ground state search of an Ising model, where combination N spins (σ- ∈ f-1}. x=1, ...,N) with lowest...
Substantial progress has been made on a new computer architecture, known as an annealing processor (AP) [1-4]. The AP can effectively solve NP-hard combinatorial optimization problems by providing fast method for finding the grand state of Ising model. In particular, various types APs based CMOS process (CMOS-AP) significantly improve scalability and power efficiency system utilizing parallel spin updates basis simulated (SA) [2-4]. Further development CMOS-APs requires overcoming two...
Annealing machines based on the Ising model which can solve combinatorial optimization problems is an emerging solution to overcome performance limit of von Neumann architecture. However, it difficult practical by existing approaches FPGA-based annealing machines, due small number implementable spins. In this paper, we propose time-division multiplexing machine architecture that efficiently utilizes on-chip memory resources in FPGA, order address large scale problems. The evaluation result...
Combinatorial optimization problems, which are categorized into NP-hard emerging in ever-growing social systems, such as logistics, traffic, and so on. A new computer architecture, called an annealing processor (AP) [1–4], has advanced to solve difficult problems efficiently accelerator the computing systems. specific type of AP discovers ground state (optimal combination variables, spins) Ising model a short time by highly parallelizing spin update process based on simulated (SA) [2–4]. We...
With the advent of IoT era, amount real-time data that is processed in centers has increased explosively. As a result, stream mining, extracting useful knowledge from huge real time, attracting more and attention. It said, however, real- time processing will become difficult near future, because performance applications continues to increase at rate 10% - 15% each year, while be increasing exponentially. In this study, we focused on identifying promising mining algorithm, specifically...
An annealing processor based on the Ising model is a remarkable candidate for combinatorial optimization problems and it superior to general von Neumann computers. CMOS-based implementations of are efficient feasible current semiconductor technology. However, critical with processors remain. There few simulated spins inflexibility in terms implementable graph topology due hardware constraints. A prior approach overcoming these emulate complicated simple high-density spin array so-called...