A5067151597- Advanced DC-DC Converters
- Analog and Mixed-Signal Circuit Design
- Silicon Carbide Semiconductor Technologies
- Advancements in Semiconductor Devices and Circuit Design
- Multilevel Inverters and Converters
- Low-power high-performance VLSI design
- Semiconductor materials and devices
- Advancements in Battery Materials
- Advancements in PLL and VCO Technologies
- Advanced Battery Technologies Research
- Radio Frequency Integrated Circuit Design
- CCD and CMOS Imaging Sensors
- Innovative Energy Harvesting Technologies
- Wireless Power Transfer Systems
Institute of Microelectronics
2020-2025
University of Macau
2019-2025
Hong Kong University of Science and Technology
2023-2025
University of Hong Kong
2023-2025
Southern University of Science and Technology
2016-2020
This article presents a fully integrated flipped voltage follower (FVF) based low-dropout (LDO) regulator with enhanced full-spectrum power supply rejection (PSR) and unity-gain bandwidth over 400MHz for noise-sensitive circuits. Following the study of three types FVF LDO's PSR performances, we propose novel LDO low-gain fast loop-1 high-gain slow loop-2. In prior LDOs, their PSRs are either full-spectrum, or not, but low at frequency. this article, utilize both dc gains loop-2 low-frequency...
High power density, high efficiency, and voltage conversion ratio (VCR) DC-DC converters are in great demand for portable devices autonomous robots. The double-step-down (DSD) converter its variants promising solutions their reduced stress on the transistors, extended duty-cycle (D), higher equivalent switching frequency [1–4]. However, all these topologies suffer from trade-off between efficiency current since output <tex xmlns:mml="http://www.w3.org/1998/Math/MathML"...
In this paper, a current-mode bandgap reference (BGR) circuit with cascode current mirrors and improved frequency compensation for achieving high power supply ripple rejection (PSRR) is presented. By slightly modifying conventional scheme, the PSRR of BGR significantly enhanced. PSRRs two different techniques have been formulated verified. Moreover, design considerations are presented, taking into account critical parasitic capacitor's effect in PSRR. To our knowledge, first time literature...
A 0.6-V 100-mA fully-integrated digital low-dropout regulator (DLDO) with adaptive current step size control is presented in this paper. By dividing the main power PMOSs into ten blocks different unit-cell sizes, proposed DLDO can turn-on/-off small light load and large ones heavy conditions. High regulation accuracy a wide range fast transient response are hence achieved. In addition, an auxiliary MOS block, which consists of both PMOS NMOS transistors, adopted to eliminate limit cycle...
This article presents a switched-capacitor (SC)-parallel-inductor buck (CPL-Buck) converter with reduced inductor voltage and current. The proposed CPL-Buck reduces the stress on power series-connected flying capacitor in one phase, alleviating current parallel-connected SC path both phases. Therefore, it effectively lowers average as well its ripple, allowing utilization of small-volume to deliver large output In addition, cover wide conversion ratio (VCR) range, is able operate either...
A transient-enhanced output-capacitor-free low-dropout regulator (LDR) based on dynamic Miller compensation (DMC) is presented in this brief. By utilizing different capacitors to compensate the LDR at load ranges, proposed DMC technique can extend loop bandwidth and enhance transient performances. The scheme simple effective. proof-of-concept with designed a 0.18-μm CMOS process. It has 100-mA maximum capability quiescent current of 8.5 μA. Measurement results show that output...
A high-efficiency <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$12\mathrm{V}$</tex> -input xmlns:xlink="http://www.w3.org/1999/xlink">$1\mathrm{V}-1.8\mathrm{V}$</tex> -output DC-DC converter with wide output current range is highly desirable in energy-efficient portable devices (e.g., laptops) and automotive applications. xmlns:xlink="http://www.w3.org/1999/xlink">$\text{In}$</tex> such applications, the considerably small duty ratio...
The profile of portable and wearable devices keeps shrinking, demanding high current density power management integrated circuits. Switched-capacitor (SC) converters buck are two common solutions. Unregulated SC can achieve efficiency for specific voltage conversion ratios (VCRs). However, to cover wide input output ranges, they require a reconfigurable topology with multiple VCRs, thus increasing the system complexity. On other hand, reach good over continuous VCR range. Yet, need bulky...
In this paper, a current-mode bandgap reference (BGR) circuit with cascode current mirrors and improved frequency compensation for achieving high power supply ripple rejection (PSRR) is presented. By slightly modifying conventional scheme, the PSRR of BGR significantly enhanced. PSRRs two different techniques have been formulated. To our knowledge, first time in literature explicitly demonstrating how due to compensation. The feedback loop stability also analyzed. simulated an example using...
A 0.6-V 100-mA fully-integrated digital low-dropout regulator (DLDO) with adaptive current step size control is presented in this paper. By dividing the main power PMOSs into ten blocks different unit-cell sizes, proposed DLDO can turn-on/-off small light load and large ones heavy conditions. High regulation accuracy a wide range fast transient response are hence achieved. In addition, an auxiliary MOS block, which consists of both PMOS NMOS transistors, adopted to eliminate limit cycle...
With the surging demands for higher current at sub-1V supply level in high performance digital systems, high-efficiency and high-current-density power converters are essential system integration. Higher voltage buses emerging applications to reduce IR losses on delivery networks. Thus, there is a wide gap between bus rails point-of-load (PoL). Meanwhile, battery-powered portable or wearable devices favor extremely high-power-density solutions, calling novel conversion topologies, which has...
This paper introduces a switched-capacitor (SC) dc-dc converter with adaptive single-boundary hysteretic (ASBH) control, increasing the output accuracy and reducing ocutput ripple among wider load range. In addition, voltage droop detection time is reduced by optimizing comparator design. We simulate verify ASBH control 12-phase interleaved SC conversion ratio (VCR) of 1/2, in STMicroelectronics 65-nm CMOS process. Operating at 1.43 GHz clock frequency, proposed supports an 1 V from 2.2...
This paper presents a 2×VDD-enabled fully-integrated CMOS low-dropout (LDO) regulator with fast transient response for cost-effective SoC power management applications elevated-VDD supply. All the MOS transistors used in proposed LDO are low voltage (LV) MOSFETs, hence saving high-voltage devices fabrication cost required conventional design. Two LV cascaded train. A mid-rail is to generate 1×Vdd as well main error amplifier guarantee safe operation. The employs stacking handle high supply...
This paper presents a [Formula: see text]-enabled output-capacitor-free CMOS low-dropout (LDO) regulator with fast transient response for cost-effective system-on-chip (SoC) power management applications elevated-[Formula: text] supply. All the MOS transistors used in proposed LDO are low voltage (LV) MOSFETs, hence saving high devices fabrication cost required conventional design. Two LV cascaded train. A mid-rail is to generate as well main error amplifier guarantee safe operation. The...