This paper presents a single-pole double-throw (SPDT), transmit/receive (T/R) switch operating from DC to 60 GHz. The SPDT is based on series-shunt circuit with broadband input and output matching circuits implemented in partially-depleted, 45-nm silicon-on-insulator (SOI) process. A buried oxide (BOX) layer demonstrated minimize substrate coupling. exhibits measured insertion loss of less than 1.7 dB at 45 GHz 2.5 an isolation greater 25 To our knowledge, this the lowest for CMOS With...

This paper presents passive integrated circuits for millimeter-wave transmitters and receivers implemented in a 45-nm CMOS silicon-on-insulator (SOI) process. The advantages of SOI over bulk are discussed circuits. First, single pole double throw (SPDT) switch demonstrates measured insertion loss less than 1.7 dB at 45 GHz third-order intermodulation intercept point (IIP3) 18.2 dBm. Second, double-balanced in-phase/quadrature (I/Q) mixer exhibits conversion 8.35 44 IIP3 15.5 At fixed IF 200...

This paper presents a pulse-compression radar baseband analog signal processing integrated in silicon process for low cost and power dissipation. The signal-processing circuitry exhibits the autocorrelation properties of polyphase codes, maximizes sensitivity resolution pulse system, alleviates speed requirements analog-to-digital converter (ADC) via an correlator. includes two-stage variable gain amplifier (VGA) high dynamic range, correlator/integrator circuit, comparator, offset...

This paper discusses a two-stage low noise amplifier (LNA) implemented in 45nm CMOS SOI process that operates between 43 and 53 GHz. The LNA stages are based on cascode with simultaneous input power matching. exhibits minimum figure (NF) of 2.9 dB at 47 GHz measured gain 18.5 49 output P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1dB</sub> compression is 3 dBm saturation 7 to reach peak efficiency 22%. OIP3 14 dBm. occupies an area 0.35mm...

This study investigates integrating pixelated colloidal quantum dot (QD) layers into LCDs to enhance color conversion and pixel-level enrichment for future display technologies. We developed miniature prototypes with pixel-sized QD color-converter seamlessly integrated the backlight unit (BLU). The prototypes, featuring red- green-emitting pixels a single blue LED on glass substrates, underwent rigorous environmental tests such as Thermal Shock Test (TST), Cycle (TCT), High Temperature...

This letter presents a loss-compensated, varactor-loaded transmission line for W-band analog phase shifter in 0.12 μm SiGe BiCMOS process. To compensate distributed varactor losses, variable gain amplifier is along the line. A shift of 65° over eight stages (8° per stage) introduced from 70-110 GHz. maximum 16.7 dB or (2.1 at 94 GHz measured. The output-referred P1 typically -7 dBm with total current consumption 20 mA 1.8 V supply voltage. chip occupies an area 0.2 mm <sup...

This paper presents a reconfigurable mixed-signal-processing circuit for high-speed pulse compression radar (PCR). Mixed-signal design techniques incorporate calibration and adaptation to improve the performance of PCR receiver. Adaptive bandwidth is an important feature maximizing dynamic range low-power system. The baseband signal processor includes variable gain amplifier, 4-bit digital-to-analog converter, analog correlator, passive integrator, flash analog-to-digital multi-range...

A W-band, bidirectional constructive wave amplifier is proposed that eliminates the need for a T/R switch. The allows amplification of either forward or backward traveling wave. measured has peak gain 16 dB and bandwidth 14.5 GHz at 90 center frequency can be electronically controlled between 77 GHz. circuit fabricated in 0.12 μm SiGe BiCMOS process, occupies an area 0.47 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , consumes...

This paper presents the design and implementation of a differential 6-bit variable gain amplifier (VGA) with low group delay imbalance over 64 states. Low is crucial for wireless positioning technologies such as ranging biosensors. The VGA designed to track Friss loss variation achieved using bias current steering. Two cascaded linear-in-magnitude stages provide 52 dB control. measured maximum 50 ps input P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML"...

As the number of radar waveforms in cognitive electronic warfare applications increases, individual detection and classification performances each waveform vary furthermore due to their different characteristics. To provide a supervised signal an efficient framework, we propose multi-stage system, where multiple modular blocks are combined classify 18 waveforms. In first stage, transform signals into time-frequency images (TFIs) using Fourier-based Synchrosqueezing Transform (FSST)...

Recently, the usage of blockchain on swarm UAV applications has gained popularity due to simplicity and security designed frameworks. Applications drones precision architecture have also been a prominent research topic for years. However, architectures that use as service (DAAS) such are still lacking some detailed analysis. This paper addresses known problems challenges networks, availability, route de-confliction, confidentiality authenticity, energy consumption. It presents conceptual...

A dual-channel CMOS distributed amplifier (DA) is proposed for a highly linear receiver front-end. Proper choice the number of stages and cutoff frequency circuit realizes isolation between channels. Analysis describes role reverse gain in minimum noise figure (NF) intermodulation distortion. The chip fabricated 0.13-μm process, occupies an area 0.60 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , consumes 18 mW from 1.2-V supply....

This paper presents a reconfigurable analog signal processing circuit for pulse compression radar. Adapting bandwidth the range of target is proposed radar systems. The baseband processor includes high-speed correlator/integrator, 4-bit flash analog-to-digital converter (ADC) and multi-range delay lock loop (DLL). DLL generates multi-phase clock to align template with received signal. fabricated in 90-nm CMOS can be configured work from 50Mb/s 1Gb/s Barker codes. A sidelobe reduction (SLR)...

This paper discusses the monolithic integration of a bidirectional front-end and analog pre-processing circuits for pulse compression radar (PCR) system. The W-band circuitry includes amplifier that operates as either an LNA or PA, phase shifter, double-balanced passive mixer. baseband two-stage VGA high dynamic range, correlator/integrator circuit, comparator, offset calibration circuits. Circuit simulations measurement results elements in 0.12-μm SiGe BiCMOS process circuit 90-nm CMOS are...

This paper presents the design of a multiple-output flyback converter (MOFC) for television power supply system. The proposed is capable independently controlling output voltage multiple rails, allowing efficient and precise delivery to various subsystems within TV. backlight LEDs' current system controlled LEDs are fed from same transformer directly, so there no need buck or boost stage. 12V regulated by extra N-MOSFET. By eliminating an additional stage adopting smaller sizes, this not...

In case of an accident between two autonomous vehicles equipped with emerging technologies, how do we apportion liability among the various players? A special regime has not even yet been established for damages that may arise due to accidents vehicles. Would immutable, time-stamped sensor records on distributed ledger help define intertwined relations subjects right through accident? What if synthetic media created deepfake gets involved in insurance claims? While integrating AI-powered...

The market penetration of electric vehicles (EVs) has increased drastically. However, the high integration EV fast-charging stations (EVFCS) into power systems makes them more vulnerable to severe grid disturbances. In case a disturbance driving system instability, fast prediction stability status is vital for allowing sufficient time take intelligent emergency control actions. Although various types machine learning (ML) and deep (DL) algorithms have been developed early detection lack...