A5024558404- Radio Frequency Integrated Circuit Design
- Microwave Engineering and Waveguides
- Advanced Power Amplifier Design
- Photonic and Optical Devices
- Advancements in PLL and VCO Technologies
- Optical Network Technologies
- Advanced Photonic Communication Systems
- Semiconductor Lasers and Optical Devices
- Semiconductor Quantum Structures and Devices
- GaN-based semiconductor devices and materials
- Analog and Mixed-Signal Circuit Design
- Full-Duplex Wireless Communications
- Semiconductor materials and devices
- Electromagnetic Compatibility and Noise Suppression
- Millimeter-Wave Propagation and Modeling
- Interconnection Networks and Systems
- Advancements in Semiconductor Devices and Circuit Design
- Low-power high-performance VLSI design
- Acoustic Wave Resonator Technologies
- Energy Harvesting in Wireless Networks
- Advanced MIMO Systems Optimization
- Advanced Fiber Laser Technologies
- 3D IC and TSV technologies
- VLSI and Analog Circuit Testing
- Electromagnetic Compatibility and Measurements
University of California, Santa Barbara
2016-2025
University of California, Los Angeles
2010-2023
North Carolina State University
2022
New York University
2021
Princeton University
2019
University of California, San Diego
2009-2018
Office of Energy Efficiency and Renewable Energy
2018
HRL Laboratories (United States)
2015
Oracle (United States)
2014
La Jolla Alcohol Research
2014
Stacked field-effect transistor (FET) CMOS millimeter-wave power amplfiers (PAs) are studied with a focus on design of appropriate complex impedances between the transistors. The stacking multiple FETs allows increasing supply voltage, which, in turn, higher output and broader bandwidth matching network. Different techniques for intermediate nodes analyzed used two-, three-, four-stack single-stage Q-band PAs. A amplifier achieves saturated greater than 21 dBm while achieving maximum...
A fully-integrated, silicon photonic transceiver is demonstrated in a silicon-on-insulator process using microring resonator modulators for low power consumption. The trade-offs between bandwidth and extinction ratio are discussed motivate the use of transmit pre-emphasis ring to increase interconnect data rate. transmitter receiver rates 25 Gb/s with BER 10 ^-12. total consumption 256 mW demonstrates link efficiency 10.2 pJ/bit excluding laser power. At Gb/s, driver operates at 7.2 pJ/bit.
Due to the heavy reliance of millimeter-wave (mmWave) wireless systems on directional links, beamforming (BF) with high-dimensional arrays is essential for cellular in these frequencies. Thus, performing array processing a power-efficient manner fundamental challenge. Analog and hybrid BF require few analog-to-digital digital-to-analog converters (ADCs DACs), but can only communicate small number directions at time, limiting search, spatial multiplexing, control signaling. Digital enables...
Power consumption is one of the most significant technical barriers for practical millimeter wave (mmWave) communication devices mobile applications. Communication in higher mmWave bands above 100 GHz will face even greater challenges. This paper attempts to provide initial power estimates under realistic parameter values and state-of-the-art device performance characteristics understand such systems today guide research future. estimated a user equipment multicarrier New Radio (NR) system...
A 40-Gb/s transimpedance amplifier (TIA) is proposed using multistage inductive-series peaking for low group-delay variation. limit TIAs derived, and a bandwidth-enhancement technique π -networks analyzed. design method group delay constrained to 3-dB bandwidth enhancement suggested. The TIA implemented in 0.13-μm CMOS process achieves of 29 GHz. gain 50 dB·Ω , the variation less than 16 ps over bandwidth. chip occupies an area 0.4 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML"...
A low-power, 40-Gb/s optical transceiver front-end is demonstrated in a 45-nm silicon-on-insulator (SOI) CMOS process. Both single-ended and differential modulators are with floating-body transistors to reach output swings of more than 2 V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">PP</sub> 4 , respectively. gain 7.6 dB measured over 33 GHz. The receiver consists transimpedance amplifier (TIA) post-amplifier 55 ·Ω 30 group-delay variation...
Gate resistance significantly limits the output power and power-added efficiency of stacked-FET amplifiers in 45 nm SOI CMOS above 60 GHz. A multi-drive approach is proposed to improve efficiency. An analysis conventional PAs demonstrates performance improvement. three-stack PA implemented for 90 GHz operation occupying 0.23 mm 2 . This achieves more than 19 dBm with peak PAE 14% 12 dB gain at using a 3.4 V supply.
A 45 GHz active phase-shift Doherty PA is proposed and implemented in 45-nm SOI CMOS. The quarter wave-length transmission line at the input of auxiliary amplifier replaced by an amplifier, increasing gain PAE more than 1 dB 5%, while reducing die area. Use slow-wave coplanar waveguides (S-CPW) improves approximately 3% dB, further reduces Two-stack FET amplifiers are used as main amplifiers, allowing a supply voltage 2.5 V output power. demonstrates peak power 8 20% GHz. It occupies 0.45 mm...
To increase the voltage handling capability of scaled CMOS-based circuits, series connection (stacking) transistors has been demonstrated in recently reported mm-wave power amplifiers. This paper discusses implementation stacked CMOS circuits employing a compact, multigate layout technique, rather than conventional individual transistors. A unit FET is composed single transistor with one source and drain multiple (four) gate connections. Capacitances are implemented distributed manner...
A channel-selecting low-noise amplifier (CS-LNA) with blocker filtering is presented for a SAW-less diversity path receiver (RX) in frequency-division duplexing cellular systems. hybrid N-path bandpass filter/band-reject filter (BPF/BRF) feedback network applied to the LNA create close-in reject bands around passband suppress transmit leakage and improve out-of-band (OOB) input-referred third-order intercept point (IIP3). Control of frequency depth demonstrated analysis simulation. g <sub...
Though GaN HEMTs have primarily been used for power amplification, they are also well suited receiver applications. In the front-end of receivers, non-linearities, in particular third-order intermodulation products lead to in-band signal distortion. The distortion is dominated by transconductance and its derivatives. this paper, we report on N-polar MIS-HEMTs able simultaneously achieve high gain (12.7 dB) excellent linearity performance (OIP3/P <sub...
As datacenters continue to scale in size, energy efficiency for short reach (<; 2 km) links is a major factor networks that may connect hundreds of thousands servers. We demonstrate based on analog coherent detection (ACD) offer promising path simultaneously achieving significantly larger link budgets and improved efficiency. A complete analysis presented considers the power consumption all photonic electronic components necessary realize an ACD architecture 50 Gbaud (GBd) quadrature...
Heterogeneous integration of III–V semiconductor photonics combined with silicon foundry technology enables low-cost, high-performance photonic integrated circuits. Highly reliable lasers using epitaxial deposition quantum dot lasers, <2 mA threshold and lifetime >>100 years at 35 C have been demonstrated University California, Santa Barbara (UCSB) can be manufactured wafer scale. Reduction in the linewidth enhancement factor allows isolator-free operation. This cost-effective circuits for...
We report a high-efficiency D-band power amplifier in 250nm InP HBT technology. The design has three common-base stages and low-loss 4:1 transmission-line output combiner. 20.5 dBm peak saturated with 20.8% PAE 15dB associated large-signal gain at 140GHz. At 1dB compression, the is 17dBm 9.7% PAE. amplifier's small-signal 20.3dB 140GHz, 3-dB bandwidth 120-163GHz. Over 125-150GHz bandwidth, within 2dB of its 140GHz maximum, an greater than 14.3%. consumes 0.52W DC occupies 0.69mm <sup...
A novel jitter equalization circuit is presented that addresses crosstalk-induced in high-speed serial links. simple model of electromagnetic coupling demonstrates the generation jitter. The analysis highlights unique aspects differ from far-end crosstalk. used to predict 2-PAM and 4-PAM, which compared measurement. Furthermore, suggests an equalizer compensates for data-induced between adjacent links suitable pre- or post-emphasis schemes. circuits are implemented using 130-nm MOSFETs...
This paper presents the first phased array transceiver operating from 71 to 86 GHz using injection-locked oscillators (ILOs) for phase shifting. A folded-cascode ILO is proposed extend locking range of an oscillators. Frequency multiplication covers a 10-GHz tuning with 23-dB power gain. Each path more than ±300° and exhibits low amplitude variation respect shift (<;1 dB) excellent isolation error (<;0.5 between elements. wideband, bidirectional RF front end delivers 10-dBm maximum output...
This paper presents an explicit analysis of the bandwidth and port imbalance a subquarter-wavelength transmission-line (t-line) transformer verifies this with design two-stage D-band power amplifier (PA). Series combining techniques incorporate both stacked heterojunction bipolar transistors (HBTs) using 8-way sub-quarter-wavelength t-line above 100 GHz. The extremely compact methodology leads to small die area 0.62 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML"...
Distributed amplifiers (DAs) feature large bandwidth but relatively low gain and power efficiency. This paper presents a supply-scaling technique to improve the efficiency of mm-wave DA while maintaining broadband $50\Omega $ match. An analysis interstage load modulation effects shunt dc-feed inductors on distributed operation is provided. A single-ended, eight-stage designed in 90 nm SiGe BiCMOS process. The fabricated amplifier has 12 dB over 3 from 14-105 GHz. measured peak output 17 dBm...
Gigabit-per-second millimeter-wave (mm-wave) access and backhaul networks at 28GHz demand high-order QAM, OFDM, and/or carrier-aggregated waveforms that force the PA to operate under high peak-to-average power ratio (PAPR) [1]. High PAPR requirements aggravate design of mm-wave Si CMOS SiGe BiCMOS PAs since a linear response efficiency are simultaneously desired. Recent work has demonstrated with peak exceeding 30% for output powers above 20dBm [1-5]. However, average associated high-PAPR...
This article presents a set of measured benchmarks for the noise and gain performance six different millimeter-wave (mm-wave) gallium nitride (GaN) high electron mobility transistor (HEMT) technologies fabricated at four foundries in United States. Measurements GaN transistors were collected on two independent parameter (NP) systems from 8–50 GHz 75–110 GHz. The resulting raw NPs stitched together to yield ultra broadband 8–110 smoothed NPs. Several comparisons summaries minimum figure...
We report the first demonstration of a full O-band coherent link for intra-data center applications, including custom photonic and electronic integrated circuits transmitter receiver. Full-link 112 Gbps (56 Gbaud QPSK) transmission is shown with <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$2.1\cdot 10^{-4}$</tex-math></inline-formula> measured BER, record baud rate 128 (64 stand-alone transmitter. The...
This paper presents a single-pole double-throw (SPDT), transmit/receive (T/R) switch operating from DC to 60 GHz. The SPDT is based on series-shunt circuit with broadband input and output matching circuits implemented in partially-depleted, 45-nm silicon-on-insulator (SOI) process. A buried oxide (BOX) layer demonstrated minimize substrate coupling. exhibits measured insertion loss of less than 1.7 dB at 45 GHz 2.5 an isolation greater 25 To our knowledge, this the lowest for CMOS With...
A stacked FET, single-stage 45-GHz (Q-band) CMOS power amplifier (PA) is presented. The design three FETs to avoid breakdown while allowing a high supply voltage. IC was implemented in 45-nm SOI process. saturated output exceeds 18 dBm from 4-V supply. Integrated shielded coplanar waveguide (CPW) transmission lines as well metal finger capacitors were used for input and matching. occupies an area of 450×500 im <sup xmlns:mml="http://www.w3.org/1998/Math/MathML"...
A broadband amplifier is realized with cascaded stagger-tuned stages that are equalized for high bandwidth and low gain ripple. The staggered frequency response demonstrated to improve the transimpedance limit of active circuits. a Darlington feedback constructive wave amplifier, which achieves group delay. implemented in 0.12-μm SiGe BiCMOS process 3-dB 102 GHz. 10 dB 1.5-dB gain-ripple group-delay variation under ±6 ps over entire bandwidth. chip occupies an area 0.29 mm <sup...