- Error Correcting Code Techniques
- Advanced Wireless Communication Techniques
- Cooperative Communication and Network Coding
- Coding theory and cryptography
- Smart Grid and Power Systems
- Advanced Sensor and Control Systems
- Industrial Technology and Control Systems
- Advanced Algorithms and Applications
- Smart Grid Security and Resilience
- Advanced Neural Network Applications
- IoT and Edge/Fog Computing
- DNA and Biological Computing
- Power Systems Fault Detection
- Iterative Learning Control Systems
- Network Time Synchronization Technologies
- Electrocatalysts for Energy Conversion
- Advanced Measurement and Metrology Techniques
- Fault Detection and Control Systems
- Advanced battery technologies research
- Underwater Vehicles and Communication Systems
- Adaptive Control of Nonlinear Systems
- Islanding Detection in Power Systems
- Telecommunications and Broadcasting Technologies
- Image Enhancement Techniques
- Elevator Systems and Control
Nanjing University
2018-2025
Chinese Academy of Sciences
2005-2024
Shenyang Institute of Automation
2015-2024
Jilin University
2024
Henan Cancer Hospital
2024
First Hospital of Jilin University
2024
Ningbo Institute of Industrial Technology
2021-2023
University of Chinese Academy of Sciences
2021-2023
China Academy of Launch Vehicle Technology
2022
China Academy of Railway Sciences
2005-2019
The corrosive anions (e.g., Cl-) have been recognized as the origins to cause severe corrosion of anode during seawater electrolysis, while in experiments it is found that natural (~0.41 M usually more than simulated (~0.5 Cl-). Here we elucidate besides Cl-, Br- even harmful Ni-based anodes because inferior resistance and faster kinetics bromide chloride. Experimental results reveal Cl- corrodes locally form narrow-deep pits etches extensively generate shallow-wide pits, which can be...
Although hydrogen gas (H
This paper studies low-complexity high-speed decoder architectures for quasi-cyclic low density parity check (QC-LDPC) codes. Algorithmic transformation and architectural level optimization are incorporated to reduce the critical path. Enhanced partially parallel decoding proposed linearly increase throughput of conventional decoders through introducing a small percentage extra hardware. Based on architectures, (8176, 7154) Euclidian geometry-based QC-LDPC code is implemented Xilinx field...
This paper presents a high-throughput decoder design for the Quasi-Cyclic (QC) Low-Density Parity-Check (LDPC) codes. Two new techniques are proposed, including parallel layered decoding architecture (PLDA) and critical path splitting. PLDA enables processing all layers by establishing dedicated message passing paths among them. The avoids crossbar-based large interconnect network. Critical splitting technique is based on articulate adjustment of starting point each layer to maximize time...
Abstract Electrochemical hydrogen evolution reaction (HER) with cost‐effectiveness, high performance, and repeatable scale‐up production hold promises for large‐scale green generation technology. Herein, a convenient method scaling up Cu 2 S@NiS@Ni/NiMo electrocatalysts on foam geometric area over 100 cm is presented. The hybrid electrode exhibits activity 190 250 mV overpotential at 1000 mA −2 superior stability negligible loss after 2000 h 500 under steady‐state conditions in both...
Using unmanned aerial vehicles (UAVs) for equipment condition monitoring is an important application of Industrial Internet Things (IIoT), and the limited energy key factor to restrict UAV. In order reduce computational load intelligence computing UAV, this article proposes a cloud edge collaborative intelligent method object detection, applies it insulator string recognition defect detection in power IIoT. First, impact extremely large aspect ratio on accuracy analyzed, then presented,...
Abstract Seawater electrolysis to produce hydrogen is a critical technology in marine energy projects; however, the severe anode corrosion caused by highly concentrated chloride key issue should be addressed. In this work, we discover that addition of sulfate electrolyte can effectively retard ions anode. We take nickel foam as example and observe greatly improve resistance, resulting prolonged operating stability. Theoretical simulations situ experiments both demonstrate anions...
This paper addresses decoder design for nonbinary quasicyclic low-density parity-check (QC-LDPC) codes. First, a novel decoding algorithm is proposed to eliminate the multiplications over Galois field check node processing. Then, partially parallel architecture processing units and an optimized variable are developed based on new algorithm. Thereafter, efficient structure dedicated promising class of high-performance QC-LDPC codes presented first time. Moreover, ASIC implementation (620,...
High-speed rail (HSR) systems potentially provide a more efficient way of door-to-door transportation than airplane. However, they also pose unprecedented challenges in delivering seamless Internet service for on-board passengers. In this paper, we conduct large-scale active-passive measurement study TCP performance over LTE on HSR. Our targets the HSR routes China operating at above 300 km/h. We performed extensive data collection through both controlled setting and passive monitoring,...
Continuous body temperature measurement (CBTM) is of great significance for human health state monitoring. To avoid interfering with users' daily activities, CBTM usually achieved using wearable noninvasive thermometers. Current thermometers employ steady-state models used in nonwearable thermometers; as a result, the reaction time long and can be disturbed by activities. However, there no work to solve these issues. In this paper, first, differences between are analyzed. Second,...
<para xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> This paper presents a high-throughput decoder architecture for generic quasi-cyclic low-density parity-check (QC-LDPC) codes. Various optimizations are employed to increase the clock speed. A row permutation scheme is proposed significantly simplify implementation of shuffle network in LDPC decoder. An approximate layered decoding approach explored reduce critical path The computation core...
Polar codes have become increasingly popular recently because of their capacity achieving property. In this paper, a memory efficient stage-combined belief propagation (BP) decoder design for polar is presented. Firstly, we briefly reviewed the conventional BP decoding algorithm. Then algorithm which combines two adjacent stages into one stage and corresponding message updating rules are introduced. Based on algorithm, memory-efficient designed. The demonstrated achieves 50% latency...
This letter proposes a low-latency secure mobile edge computing (MEC) system where multiple users offload tasks to base station in the presence of an eavesdropper. We jointly optimize users' transmit power, capacity allocation, and user association minimize transmission latencies over all subject security resource constraints. Numerical results show that our proposed algorithm outperforms baseline strategies. Furthermore, we highlight novel trade-off between latency MEC systems.
Target recognition is one of the core tasks transmission line inspection based on Unmanned Aerial Vehicle (UAV), and at present plenty deep learning-based methods have been developed for it. To enhance generalization ability models, a huge number training samples are needed to cover most all possible situations. However, due complexity environmental conditions targets, limitations images’ collection annotation, usually insufficient when learning model target recognition, which main factors...
Turbo decoders inherently have large decoding latency and low throughput due to iterative decoding. To increase the reduce latency, high-speed schemes be employed. In this paper, following a discussion on basic parallel architectures, segmented sliding window approach two other types of area-efficient are proposed. Detailed comparison storage requirement, number computation units, overall is provided for various with different levels parallelism. Hybrid proposed as an attractive solution...
This paper presents a memory efficient partially parallel decoder architecture suited for high rate quasi-cyclic low-density parity-check (QC-LDPC) codes using (modified) min-sum algorithm decoding. In general, over 30% of can be saved conventional architectures. Efficient techniques have been developed to reduce the computation delay node processing units and minimize hardware overhead processing. The proposed linearly increase decoding throughput with small percentage extra hardware....
<para xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> Low-density parity-check (LDPC) codes are one of the most promising error-correcting approaching Shannon capacity and have been adopted in many applications. However, efficient implementation high-throughput LDPC decoders adaptable for various channel conditions still remains challenging. In this paper, a low-complexity reconfigurable VLSI architecture high-speed is presented. Shift-LDPC...
Recently developed algebraic soft-decision (ASD) decoding of Reed-Solomon (RS) codes have attracted much interest due to the fact that they can achieve significant coding gain with polynomial complexity. One major step ASD is interpolation. Available interpolation algorithms only add points or increase multiplicities. However, backward interpolation, which eliminates reduces multiplicities, indispensable enable reusing results in following two scenarios: 1) needs be carried out on multiple...
Low-Density Parity-check (LDPC) code, being one of the most promising near-Shannon limit error correction codes (ECCs) in practice, has attracted tremendous attention both academia and industry since its rediscovery middle 1990's. Owning excellent coding gain, LDPC code also very low floor, inherent parallizable decoding schemes. Compared to other ECCs such as Turbo codes, BCH RS many more varieties construction, which result various optimum architectures associated with different structures...
Currently images are key evidences in many judicial or other identification occasions, and image forgery detection has become a research hotspot. This paper proposes novel motion blur based method, which includes three steps. First, convolutional neural network (CNN)-based kernel reliability estimation method is proposed, used to determine whether an patch should be involved the process. Second, shared kernels-based tamper proposed detect group of kernels projected from same 3D camera...
This paper presents a high-throughput decoder architecture for rate-compatible (RC) low-density parity-check (LDPC) codes which supports arbitrary code rates between the rate of mother and 1. Puncturing techniques are applied to produce different quasi-cyclic (QC) LDPC with dual-diagonal parity structure. Simulation results show that our selected puncturing scheme only introduces BER performance degradation less than 0.2 dB, compared dedicated specified in IEEE 802.16e (WiMax) standard....
The flexible job shop scheduling problem has always been the focus of research in manufacturing field. However, most previous studies focused more on efficiency and ignored energy consumption. Energy, especially non-renewable energy, is an essential factor affecting sustainable development a country. To this end, paper designs model with consideration line production Except for processing stage, consumption transport, set up, unload, idle stage are also included our model. weight property...
RISC-V processors encounter substantial challenges in deploying multi-precision deep neural networks (DNNs) due to their restricted precision support, constrained throughput, and suboptimal dataflow design. To tackle these challenges, a scalable vector (RVV) processor, namely SPEED, is proposed enable efficient DNN inference by innovations from customized instructions, hardware architecture, mapping. Firstly, dedicated instructions are based on RVV extensions, providing SPEED with...