Jafar Shamsi

ORCID: 0000-0003-0570-1394
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About
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Research Areas
  • Advanced Memory and Neural Computing
  • Neural dynamics and brain function
  • Ferroelectric and Negative Capacitance Devices
  • Neural Networks and Reservoir Computing
  • Neuroscience and Neural Engineering
  • Neural Networks and Applications
  • CCD and CMOS Imaging Sensors
  • Semiconductor materials and devices
  • Neuroinflammation and Neurodegeneration Mechanisms
  • Complex Network Analysis Techniques
  • Quantum-Dot Cellular Automata
  • Peer-to-Peer Network Technologies
  • Web Data Mining and Analysis

University of Calgary
2023-2024

Iran University of Science and Technology
2014-2022

Instituto de Microelectrónica de Sevilla
2020-2022

Recently memristor-based applications and circuits are receiving an increased attention. Furthermore, memristors also applied in logic circuit design. Material implication is one of the main areas with memristors. In this paper optimized full adder design by material presented. This needs 27 less area comparison typical CMOS-based 8-bit adders. Also presented only 184 computational steps which enhance former speed 20 percent.

10.1109/icecs.2014.7050047 article EN 2014-12-01

Neuromorphic utilizes VLSI technology to implement a brain-inspired architecture. Recently, associative memory with large capacity and robust retrieval, known as columnar-organized (COM), has been introduced. COM is combination of spiking winner-take-all (WTA) units, which inspired by the cortex structure. In this paper, hardware architecture proposed that presented at three levels design. At level I, low-power circuit leaky integrate fire neuron introduced compatible COM. II, assembly...

10.1109/tvlsi.2018.2815025 article EN IEEE Transactions on Very Large Scale Integration (VLSI) Systems 2018-04-03

Oscillatory Neural Networks (ONNs) are currently arousing interest in the research community for their potential to implement very fast, ultra-low-power computing tasks by exploiting specific emerging technologies. From architectural point of view, ONNs based on synchronization oscillatory neurons cognitive processing, as occurs human brain. As technologies, VO 2 and memristive devices show promising efficient implementation ONNs. Abundant literature is now becoming available pertaining...

10.3389/fnins.2021.674567 article EN cc-by Frontiers in Neuroscience 2021-07-16

In this paper, design of a passive resistive-type neuron is proposed to generate the hyperbolic tangent function as activation function. The has advantage not needing any biasing voltage and therefore its power consumption low. circuit designed simulated in 180 nm CMOS technology. shows good approximation with maximum error average from ideal by 19.7% 6.88% respectively. 62.5 μW while standby zero. Also applied large neural network results functionality. pattern recognition implemented using...

10.1109/iscas.2015.7168700 article EN 2022 IEEE International Symposium on Circuits and Systems (ISCAS) 2015-05-01

Memristors have the potential to significantly impact memory market, and demonstrated for analog computing within a sub-class of neuro-inspired information processing. In order enable circuit designers use test memristor/CMOS hybrid circuits, it is necessary an accurate reliable memristor model. this work, new model based on Charge Transport Mechanism (CTM) presented. This paper analyzes different current mechanisms that exist in Schottky barrier region memristors: direct tunneling,...

10.1016/j.mejo.2017.05.006 article EN Microelectronics Journal 2017-05-20

Computers transform to the smaller, faster and more reliable devices year by year. Accordingly designing efficient logic gates, as basic blocks of VLSI chips, are essential for circuit designers. Since integration reached its limits through conventional technologies mainly CMOS based designs quest novel promising was commenced. Memristor is a passive element that has been fabricated recently taken increasing attentions. Less area non-volatility most important properties this element. Also...

10.1109/iraniancee.2014.6999567 article EN 2014-05-01

In this paper, an ultra-low power single output two stage CMOS operational amplifier (Op-Amp) is designed based on using a novel memristor-based compensation technique. Also, memristor programmer applied for regulating the memristance of block proposed Op-Amp. By applying as potentiometer, Op-Amp can regulate its right half plain zero to improve stability and phase margin. Simulation results are presented two-stage The in 0.18 μm technology. exhibits 94 dB DC gain. unity gain bandwidth (UGB)...

10.1109/ccece.2017.7946785 article EN 2017-04-01

A neuron circuit is a basic processing module which used to implement neuromorphic chip. In this paper, low power of leaky integrate and fire (LIF) proposed. It compact circuit, designed simulated in 0.18μm CMOS technology. The static about 35pW it consumes around 2pJ/spike. also provides global reset as lateral inhibitory connection WTA module.

10.1109/iraniancee.2017.7985473 article EN 2017-05-01

Analog implementation of Oscillatory Neural Networks (ONNs) has the potential to implement fast and ultra-low-power computing capabilities. One drawbacks analog is component mismatches which cause desynchronization instability in ONNs. Emerging devices like memristors VO2are particularly prone variations. In this paper, we study effect on performance differential ONNs (DONNs). Mismatches were considered two main blocks: oscillatory neurons synaptic circuits. To measure DONN tolerance each...

10.1109/tcsi.2022.3221540 article EN IEEE Transactions on Circuits and Systems I Regular Papers 2022-11-21

Hebbian rule plays an important role in training of artificial neural networks. According to this rule, a synaptic weight between two neurons is increased or decreased depending on the activity presynaptic and postsynaptic neurons. In paper, oscillatory version proposed for ONNs called Oscillatory Rule (OHR). OHR simply expresses change as function phase difference Similar STDP that exponential time spikes, relates using functions. Specifically, when are in-phase, them while anti-phase...

10.1109/dcis51330.2020.9268618 article EN 2020-11-18

Abstract This paper presents an optimized stochastic multiplier to implement Izhikevich spiking neuron model. A novel number generator is used as the main block for computing design a multiplier. The designed was describe and model equation which capable produce variant responses of neurons. To best author's knowledge, this work pioneer using all multiplication expressions in equation. effect increasing bit streams on accuracy studied. Furthermore, some numerical intervals that are more...

10.1002/cta.3322 article EN International Journal of Circuit Theory and Applications 2022-05-25

Pulse-coupled oscillators (PCOs) are used as models for oscillatory systems in diverse fields such biology, physics, and engineering. When correctly coupled, PCOs can display sophisticated emergent dynamics large numbers of oscillators. Here, we propose an algorithm hardware implementation to emulate arbitrary linear differential equations (DEs) with inputs, which similar the feedback control laws or linearizations nonlinear systems. We show that m populations solve a set m-dimensional DEs...

10.36227/techrxiv.171332392.20036272/v1 preprint EN cc-by 2024-04-17

Oscillatory neural networks (ONNs) exhibit a high potential for energy-efficient computing. In ONNs, neurons are implemented with oscillators and synapses resistive and/or capacitive coupling between pairs of oscillators. Computing is carried out on the basis rich, complex, non-linear synchronization dynamics system coupled The exploited phenomena in ONNs an example fully parallel collective A fast system's convergence to stable states, which correspond desired processed information, enables...

10.3389/fnins.2023.1294954 article EN cc-by Frontiers in Neuroscience 2023-12-04

Most rhythmic patterns of animal behaviors are produced by central pattern generators (CPGs) found in nervous system. Hardware implementation CPGs offers neural prosthesis to restore lost functions due neurological disease or injury. It also can be applied industrial technology such as robotics. In this paper, emulation a CPG using CMOS neurons and memristor-based synapses is proposed. The proposed comprises two Izhikevich synapses. circuit designed simulated 0.35μm technology. Using...

10.1109/iraniancee.2017.7985419 article EN 2017-05-01

This paper presents a Memristor base 4-bit digital-to-analog convertor. A single input programmer consisting of DeMultiplexer and reset switch is used to adjust memristance memristors. By using this programmer, memristances value reached the targets with maximum error ±1%. The proposed DAC achieves DNL (differential nonlinearity) an INL (integral 0.075 LSB 0.123 LSB, respectively.

10.1109/iraniancee.2015.7146427 article EN 2015-05-01

Brain-inspired computing employs human brain capability to introduce tools for high performance and robust systems. Recently, a brain-inspired associative memory with large capacity retrieval has been introduced, which is called Columnar Organized Memory (COM). It comprises spiking winner-take-all (WTA) networks, that basic building block of the neocortex. The upper bound COM calculated previously. However, there not simulation result show actual an implemented COM. In this paper, analyzed...

10.1109/mwscas.2018.8624063 article EN 2018-08-01

Recently memristor-based applications and circuits are receiving an increased attention. Furthermore, memristors also applied in logic circuit design. Material implication is one of the main areas with memristors. In this paper optimized full adder design by material presented. This needs 27 less area comparison typical CMOS-based 8-bit adders. Also presented only 184 computational steps which enhance former speed 20 percent.

10.48550/arxiv.1501.00606 preprint EN other-oa arXiv (Cornell University) 2015-01-01

Analog implementation of Oscillatory Neural Networks (ONNs) has the potential to implement fast and ultra-low-power computing capabilities. One drawbacks analog is component mismatches which cause desynchronization instability in ONNs. Emerging devices like memristors VO2 are particularly prone variations. In this paper, we study effect on performance differential ONNs (DONNs). Mismatches were considered two main blocks: oscillatory neurons synaptic circuits. To measure DONN tolerance each...

10.48550/arxiv.2211.05497 preprint EN cc-by arXiv (Cornell University) 2022-01-01
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