A5053763790- Radio Frequency Integrated Circuit Design
- Low-power high-performance VLSI design
- Analog and Mixed-Signal Circuit Design
- Advancements in PLL and VCO Technologies
- Bluetooth and Wireless Communication Technologies
- Energy Harvesting in Wireless Networks
- Advanced Sensor and Energy Harvesting Materials
- Advanced Battery Technologies Research
- Advanced Memory and Neural Computing
- Parallel Computing and Optimization Techniques
- Innovative Energy Harvesting Technologies
- Advancements in Semiconductor Devices and Circuit Design
- Neuroscience and Neural Engineering
- Advanced Power Amplifier Design
- Ferroelectric and Negative Capacitance Devices
- CCD and CMOS Imaging Sensors
- Semiconductor materials and devices
- Electromagnetic Compatibility and Noise Suppression
University of Virginia
2015-2024
In this paper, we present an all-digital ring oscillator (RO)-based Bluetooth low-energy (BLE) transmitter (TX) for ultra-low-power radios in short range Internet-of-Things (IoT) applications. The power consumption of state-of-the-art BLE TXs has been limited by the relatively power-hungry local (LO) due to use LC oscillators superior phase noise (PN) performance. This paper addresses issue analyzing PN limit a TX and proposes RO-based solution cost savings. proposed features: 1) wideband...
Improving system lifetime and robustness is a key to advancing self-powered platforms for real world applications. A complete self-powered, battery-less, wearable platform requires microwatt-power system-on-chip (SoC), operating reliably within this budget, capable of surviving long periods without charging, recovering from power loss its previous state. To meet these requirements, we designed wireless sensing heterogeneous system-in-package (SiP) containing an ultra-low (ULP) SoC,...
This article presents an ultra-low-power (ULP) Internet-of-Things (IoT) system-on-chip (SoC) using a triple-mode power management unit (PMU) to achieve self-adaptive power–performance scaling and energy-minimized operation. The proposed PMU comprises three modes: energy-aware (EA) mode, performance-aware (PA) minimum energy point (MEP) tracking mode. By controlling microprocessor with the modes, SoC can adaptively scale its frequency supply voltage based on either input availability or task...
Two prototypes of low-power back-channel (BC) Bluetooth low-energy (BLE) wake-up receivers are presented. The scan the BLE advertising channels for modulated channel patterns by hopping local oscillator (LO) frequency. BC message is in sequence three each event. This makes via messaging compatible with standard, so it can be generated a commercial offthe-shelf device. first proposed receiver uses dual mixer to downconvert RF input reduce ring-based LO power consumption operating at half...
This letter presents an RISC-V microprocessor implemented using a proposed scalable dynamic leakage suppression (SDLS) logic style. Together with custom adaptive clock generator and voltage scaling controller, the SDLS realizes fully integrated modified frequency (DVFS) scheme that enables nW-level performance flexibility for battery-less IoT sensing nodes in energy-scarce environments. At nominal core VDD of 0.6 V, can scale its from 6 nW at 11-Hz operating to 140 8.2-kHz frequency. Across...
A 507nW self-powered SoC is demonstrated for ultra-low power (ULP) internet-of-things (IoT) applications. The includes ULP system-in-package (SiP) interfaces that enable its harmonious integration with a radio transmitter (TX) and non-volatile memory (NVM). energy harvesting platform manager (EH-PPM) powers the as well off-chip components optimized low quiescent power. It supplies 0.5V, 1.0V, 1.8V can also sensors SiP while running an example shipping-integrity tracking algorithm. monitor...
This paper presents a power efficient analog front-end (AFE) for electrocardiogram (ECG) signal monitoring and arrhythmia diagnosis. The AFE uses low-noise low-power circuit design methodologies aggressive voltage scaling to satisfy both the low consumption input-referred noise requirements of ECG acquisition systems. was realized with three-stage fully differential AC-coupled amplifier, it provides bio-signal programmable gain bandwidth. implemented in 130 nm CMOS process, has measured...
A standalone, fully integrated 0.2V 578μW ultra-low voltage (ULV) 2.4GHz 802.11ba WiFi wake-up receiver (WRX) is presented. It includes a current-efficient ULV noise cancelling LNA with high turn step-up transformer, and Q-enhanced RF gain stages for low figure. 1/3 f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">RF</sub> mixer FLL are implemented to reduce current. The chip micro-power managers regulating all internal voltages from single...
this paper presents an all-digital Ring Oscillator (RO) based Bluetooth Low-Energy (BLE) transmitter (TX) for ultra-low-power radios in short range IoT applications. It employs a wideband ADPLL featuring f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">RF</sub> /4RO, with embedded 5-bit TDC. A 4X frequency edge combiner is used to generate the 2.4GHz signal. This helps reduce power consumption and enhance its phase noise performance at same...
A self-powered IoT system-on-chip (SoC) reduces power to sub-μw and employs multiple power-management techniques trade-off ultra-low (ULP), higher performance, smaller energy harvester footprint, longer operating lifetime. Minimum Energy Point Tracking (MEPT) [1]–[4] keeps an SoC at the minimum point (MEP) enhance system Previous sample-and-hold MEPT schemes need frequent voltage comparisons a high-frequency clock that increases [2]. Current-ratio-based relies on specialized CMOS technology...
This work presents NanoWattch, a self-powered SoC in 65-nm CMOS with integrated temperature sensing for miniaturized IoT applications. NanoWattch can cold-start and sustain operation directly from ambient light photovoltaic input as low 160mV. A performance-scalable RISC-V processor 6kB SRAM DVFS subsystem enable system power consumption to continuously adapt energy conditions down minimum total of 3nW provide always-on mm-scale form factor.
A low power backchannel BLE wake-up receiver is presented. The monitors the advertising channels for a pre-programmed pattern. As in standard, frequency shift modulation (FSK) chosen to be scheme of signal that will received. This makes algorithm compatible with and hence, it can generated by commercial off-the-shelf device. proposed uses dual-mixer down-convert RF input reduce LO consumption operating at half frequency. has -57.5 dBm sensitivity while consuming 150 μW.
Self-Powered Systems (SPSs) targeting the Internet-of-Things (IoT) have potential to monitor an incredible array of environments and equipment, providing previously unavailable rich data insights [1]. Unlike battery-powered systems that optimize for energy per operation, SPSs must scale their power consumption in response environmental changes. This presents both a challenge opportunity such systems: 1) they low floor continuously operate at harvested (low <tex...
This paper presents an ultra-low power (ULP) node-controlling system-on-chip (SoC) used for power-mode management and phantom energy reduction of miscellaneous electric loads (MELs). The SoC is powered from a single 2.5 V voltage supply enabled by the integrated unit (PMU) can control up to 16 MELs due on-chip 16-channel correlator 32b RISC-V microprocessor. To further reduce system consumption, two clock domains have been adopted processor separately. Fabricated in 65-nm CMOS, measured...
With device scaling in bulk technologies, process variation increases and SRAM V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">MIN</sub> faces a bottleneck. Using peripheral assist techniques, we can lower the at cost of energy area. However, is highly dependent on voltage, temperature, operating frequency fluctuations, which are hard to determine real time. Prior work shows theoretically that canary SRAMs using reverse track dynamic write ....
This paper presents a lossless sensor data compression accelerator for power reduction in wireless body sensors. First, low complexity algorithm is demonstrated the first time on electrocardiogram (ECG) and acceleration data. Second, implemented as custom hardware health monitoring driven System Chip (SoC) 130 nm process. The closely integrated with transmitter interface to minimize its contribution system reduce user overhead. adds only 4.4 nW processing overhead reduces required duty cycle...