A piezoelectric energy-harvesting system, including a parallel-synchronized-switch harvesting-on-inductor (SSHI) rectifier and integrated maximum-power-point tracking (MPPT), is presented. The perturb & observe (P&O) algorithm adopted for the MPPT of parallel-SSHI rectifier. Furthermore, an output power evaluation P&O proposed its detailed implementation in full analog domain analyzed. Fabricated 130-nm CMOS, measurement results show harvesting system achieves 417% energy-extraction...

Improving system lifetime and robustness is a key to advancing self-powered platforms for real world applications. A complete self-powered, battery-less, wearable platform requires microwatt-power system-on-chip (SoC), operating reliably within this budget, capable of surviving long periods without charging, recovering from power loss its previous state. To meet these requirements, we designed wireless sensing heterogeneous system-in-package (SiP) containing an ultra-low (ULP) SoC,...

Energy harvesting and power management units (EHPMUs) are gaining popularity for self-powered Internet-of-Things (loT) applications due to their ability of extracting ambient energy powering load circuits through a single block. Among all EHPMU architectures, the multi-input single-inductor multi-output (MISIMO) [1]–[6] has benefits small form factor, high efficiency, from multi-modal sources, different types loads. Self-powered loT also require EHPMUs have ultra-low quiescent power, wide...

This article presents an ultra-low-power (ULP) Internet-of-Things (IoT) system-on-chip (SoC) using a triple-mode power management unit (PMU) to achieve self-adaptive power–performance scaling and energy-minimized operation. The proposed PMU comprises three modes: energy-aware (EA) mode, performance-aware (PA) minimum energy point (MEP) tracking mode. By controlling microprocessor with the modes, SoC can adaptively scale its frequency supply voltage based on either input availability or task...

A 507nW self-powered SoC is demonstrated for ultra-low power (ULP) internet-of-things (IoT) applications. The includes ULP system-in-package (SiP) interfaces that enable its harmonious integration with a radio transmitter (TX) and non-volatile memory (NVM). energy harvesting platform manager (EH-PPM) powers the as well off-chip components optimized low quiescent power. It supplies 0.5V, 1.0V, 1.8V can also sensors SiP while running an example shipping-integrity tracking algorithm. monitor...

This work presents an ultra-low power event driven wake-up receiver (WuRx) fabricated in a RF CMOS 130 nm process. The consists of off-chip lumped element matching network, envelope detector, decision circuit capable detecting sub-mV baseband signal voltages and clock source consuming 1.3 nW. has demonstrated sensitivity -72 dBm while total 8.3 nW from 1 V 0.65 sources.

This article presents a highly efficient buck converter with sub-nW quiescent power and wide dynamic range for ultra-low-power (ULP) Internet-of-Things (IoT) systems-on-chip (SoCs). To optimize the SoC consumption performance, this supports fast voltage frequency scaling (DVFS) load-transient response (FLTR) using an asynchronous control scheme. achieve robust high-efficiency delivery over process, voltage, temperature variations, adaptive deadtime controller (ADTC) is proposed minimized...

This work presents an integrated maximum-power-point tracking (MPPT) algorithm and its implementation for the high-performance parallel-synchronized-switch harvesting-on-inductor (SSHI) rectifier, which uses Perturb Observe (P&O) method a proposed power monitor output evaluation. Fabricated in 130nm, this piezoelectric energy-harvesting system implements 417% FOM rectifier with 97% efficiency MPPT, makes it first demonstrating parallel-SSHI high tracking-efficiency MPPT simultaneously.

Voltage regulators for emerging nW-to-μW Internet-of-Things (IoT) systems-onchip (SoCs) require ultra-low quiescent power to enhance lifetime, a large dynamic load range support multiple components and applications, fast transient performance duty-cycled loads. Switching [1,2] can achieve sub-nW operation, but suffer from slow settling time output voltage ripple that deteriorate analog RF performance. Digital low-dropout (DLDOs) offer faster response, low-voltage flexible control schemes...

A standalone, fully integrated 0.2V 578μW ultra-low voltage (ULV) 2.4GHz 802.11ba WiFi wake-up receiver (WRX) is presented. It includes a current-efficient ULV noise cancelling LNA with high turn step-up transformer, and Q-enhanced RF gain stages for low figure. 1/3 f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">RF</sub> mixer FLL are implemented to reduce current. The chip micro-power managers regulating all internal voltages from single...

On-chip oscillators are popular clocking solutions for a wide range of circuits and systems due to their ease integration low form factor, but energy efficiency is typically limited the pJ/cycle by number contributors, such as active biasing currents, frequency dividers, comparators. This work presents an on-chip oscillator energy-efficient Internet-of-Things (IoT) applications based on duty-cycled digital frequency-locked loop (DFLL) that reduces disabling energy-hungry components only...

A self-powered IoT system-on-chip (SoC) reduces power to sub-μw and employs multiple power-management techniques trade-off ultra-low (ULP), higher performance, smaller energy harvester footprint, longer operating lifetime. Minimum Energy Point Tracking (MEPT) [1]–[4] keeps an SoC at the minimum point (MEP) enhance system Previous sample-and-hold MEPT schemes need frequent voltage comparisons a high-frequency clock that increases [2]. Current-ratio-based relies on specialized CMOS technology...

This work presents NanoWattch, a self-powered SoC in 65-nm CMOS with integrated temperature sensing for miniaturized IoT applications. NanoWattch can cold-start and sustain operation directly from ambient light photovoltaic input as low 160mV. A performance-scalable RISC-V processor 6kB SRAM DVFS subsystem enable system power consumption to continuously adapt energy conditions down minimum total of 3nW provide always-on mm-scale form factor.

The research on MEMS wireless sensing technology adapted to strong power frequency electromagnetic field environments is of great significance our energy security, economic society, and even national security. Here, we propose a subwavelength cross-meandering resonator (0.49λ0 × 0.49λ0) simultaneously achieve shielding communication signal transmission. element size the only λ0/11, which much smaller than that previous works. In resonator, resonance mode with significant near-field...

This paper presents an ultra-low power (ULP) node-controlling system-on-chip (SoC) used for power-mode management and phantom energy reduction of miscellaneous electric loads (MELs). The SoC is powered from a single 2.5 V voltage supply enabled by the integrated unit (PMU) can control up to 16 MELs due on-chip 16-channel correlator 32b RISC-V microprocessor. To further reduce system consumption, two clock domains have been adopted processor separately. Fabricated in 65-nm CMOS, measured...

The power consumption of ultra-low-power (ULP) Internet-of-Things (IoT) SoCs and components has been scaling down from μW to pW levels over the past ten years. Designing energy harvesting management units (EH-PMUs) that consume sub-μA quiescent current efficiently provide such low load is challenging. This paper reviews trends techniques for EH-PMUs with a specific focus on choice between analog digital implementations. We first discuss ULP EH-PMU design based recent published results then...

A Wideband 10GHz LC Voltage Controlled Oscillator (LC-VCO) with small K <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">VCO</sub> variation implemented on GSMC 0.13um CMOS process is presented. The proposed LC-VCO uses 4 bits Digital Control Capacitor Array (DCCA) technology to achieve a wideband frequency tuning range. This work also applies varactor arrays different bias voltage instead of single improve the linearity. post-layout simulation...

High-resolution time-to-digital converters (TDCs) are important time measurement circuits in various high-speed electronic systems. The development of semiconductor technology improves the resolution TDCs, but also introduces negative impact like process variations. Since modern TDCs designed to achieve picosecond magnitude, variations become a big concern. In this work, we present configurable compact algorithmic TDC (CCATDC), that can digitize analog input into binary codes. Moreover,...

This work presents an on-chip oscillator for energy-efficient IoT applications based on a duty-cycled digital frequency-locked loop (DFLL). The implementation allows low-voltage operation at 0.5V to reduce energy and enable voltage rail integration with low-energy logic, while the further improves efficiency record value of 18.8fJ/cycle (10.5nW @ 560kHz) maintaining high temperature stability 96.1ppm/°C from 0°C 100°C.

Time‐to‐digital converters (TDCs) are an important circuit block in time‐of‐flight sensors, fluorescence lifetime and self‐calibrating digital circuits. Fine‐resolution TDCs usually built with chains of delay elements, but this architecture requires large area, conversion time, power consumption. A novel compact TDC based on the cyclic comparison algorithm is presented, which implemented tested TSMC, 0.35 μm process within a 200 × area demonstrated that proposed achieves rate 10 ns/bit...

This work presents a sub-nW trim-free sub-bandgap reference (sub-BGR) using switched-capacitor (SC) topology with wide supply range and high accuracy for nanowatt IoT systems.Fully characterized bipolar junction transistors (BJTs) pA bias current reduce the BGR power down to pW while keeping by minimizing process variation.An integrated voltage monitor automatically tracks input configures charge pump support range.A low duty-cycle clock, an ultra-low-leakage switch, dummy load capacitors...

This paper presents a buck converter with sub-nW quiescent power, high efficiency, and wide dynamic range for ultra-low-power (ULP) IoT SoCs. To optimize the SoC power consumption, supports fast voltage frequency scaling (DVFS) enables load-transient response (FLTR) through asynchronous control. In addition, is fully self-contained all features integrated on chip including proposed adaptive deadtime controller. Fabricated in 65nm CMOS, measurement results show has an 802pW at 1.5V input 93%...