In this paper, we present four examples of highly integrated 60 GHz single-chip CMOS 90nm digital radios and phased array solutions. These solutions include for the first time digital-to-analog/analog-to-digital conversion embedded multi-gigabit mixed signal modem requiring no external processing. This convergence 60GHz radio, low power mixed-signal processing on a single chip offers lowest energy per bit transmitted wirelessly at rate to meet very stringent low-power specifications battery...

The ever-increasing demand for global mobile data traffic over time has had an avalanche effect on the deployment of cellular infrastructure as driven by both rising number smartphones and subscriptions increasing average volume per subscription. total logged 90 exabytes monthly in 2022 is forecasted to reach 324 month 2028, which equates a percentage increase 260% <xref ref-type="bibr" rid="ref1" xmlns:mml="http://www.w3.org/1998/Math/MathML"...

This paper presents a fully-integrated two-stage GaN Doherty Power Amplifier (DPA) Module for 5G massive MIMO base stations. To overcome the size limitation of PAs in base-stations while meeting wideband requirement, new compact frequency-dependent compensating circuit with zero-phase offset peaking amplifier is proposed. The proposed not only increases bandwidth DPA, but also works as matching network, resulting and flexible design. method applied to 10mm × 6mm DPA module. Measurements show...

Interpolation involves the process of estimating values at positions in between adjacent samples, which has very fundamental and applied implications signal processing communication systems. In this work, a new method cubic spline interpolation (CSI) is proposed derived mathematically from input samples respecting time-domain boundary conditions, corresponding piecewise polynomials are optimized frequency domain to achieve good spectral properties. A comparative analysis several prior arts,...

We demonstrate, for the first time, a bi-directional in-building radio-over-fiber access network to deliver multi-gigabit, high-definition video and data services using all-optical conversion at head-end single-chip, 60GHz CMOS radio transceiver end-terminals.

In this paper, we present a highly integrated 60 GHz CMOS/PCB single-chip digital phased array solution, embedded in QFN package. This represents unique opportunity to develop low power 60GHz multi-gigabit radio at similar cost structure as Bleutooth® radio, addressing the needs of multitude bandwidth hungry wireless multimedia applications such high definition streaming and massive side-loading. The convergence CMOS technology, mixed-signal processing filter, antenna standard package is...

Within a relatively short period of time, we have seen five distinct generations cellular technology roll out, with each delivering enhancements in terms quality service (QoS) while at the same time enabling new features and services, as highlighted <xref ref-type="fig" rid="fig1" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Figure 1</xref> . Every successive generation wireless standards has introduced advances data-carrying capacity reliable low...

Over the past two decades there has been much interest in use of signal processing techniques to enhance RF performance non-linear wireless systems. This paper presents challenges and requirements for a wide range modern telecommunication applications from cellular mobile devices infrastructure base stations. We shall also consider how overall linearization system architecture is influenced by design choices application requirements. More specifically, we will compare analyze different...

In this paper, we present a single chip cross-layer approach for new class of highly integrated CMOS millimeter wave and sub-THz communication sensing wireless systems. It is based on the convergence fully digital radio beam former, low power multi-gigabit mixed-signal processing cost packaging with embedded antenna. A 60GHz CMOS/PCB portable beam-former solution scalable V-band 45nm architecture are highlighted as leading edge examples such an approach, enabling breakthrough power/size...

This paper presents shaping and linearization techniques to trade-off linearity power efficiency in a dual-input pseudo-Doherty load-modulated balanced amplifier (PD-LMBA). The proposed function is defined operate the frequency domain it oriented at exploiting architecture of PD-LMBA either enhance or efficiency. In addition, since requirements are not met by simply input signals, digital predistortion (DPD) applied on top it. Experimental validation DPD provided for excited with 200 MHz...

In this paper, we present a single chip cross-layer approach for new class of highly integrated CMOS millimeter wave and sub-THz communication sensing wireless systems. It is based on the convergence fully digital radio beam former, low power multi-gigabit mixed-signal processing cost packaging with embedded antenna. A 60GHz CMOS/PCB portable beam-former solution scalable V-band 45nm architecture are highlighted as leading edge examples such an approach, enabling breakthrough power/size...

Over the past two decades, various behavioral modeling techniques have been proposed to compensate for non-idealities in wireless systems, including quadrature errors, channel imbalance, interleaved spurs, harmonic distortion and intermodulation distortion, improve radio performance efficiency. This paper aims provide an overview of prevalent digital compensator models considering memory effects bandpass non-linearities as well model complexity reduction algorithms, orthogonal matching...

In this paper a low-power multi-gigabit single-chip transceiver is demonstrated in 90nm CMOS operating the worldwide allocated 7.2GHz–8.5GHz ultra-wideband frequency spectrum. The operates as an MB-OFDM compatible front-end well single-carrier modulator/demodulator with integrated BPSK baseband modem. An embedded pulse shaping filter enables transmission of 2.4Gbps data while meeting UWB spectral mask from 7.2GHz–10.2GHz and 1Gbps worldwide-allocated band 7.2GHz–8.5GHz. analog bandwidth...

In this paper, we present a novel implementation of cubic spline interpolation (CSI). addition to solving the time domain boundary conditions between neighboring samples, optimize coefficients piecewise polynomials in frequency achieve good in-band and out-of-band responses while maintaining low-latency low-complexity properties conventional CSI. To demonstrate advantage, 200 MHz instantaneous bandwidth (iBW) signal consisted two 100 5G New Radio (NR) waveforms is adopted simulation. The...

Confusion, frustration and anxiety are caused by the ineffective communication in healthcare system. Patients family members usually have a hard time to acquire necessary information hospitals. The literacy, wide range of patient-age population, text-only teaching sheets important factors block communication. Therefore, proposed work presents an innovative board that is designed specifically for current pediatric environment deliver messages more effectively through fun interactive approach....

An active interference cancellation system is presented in BiCMOS 8HP capable of eliminating undesired signals resulting from an on-chip clock whose fundamental and/or harmonics couple into a receiver path. The fundamentals 6 – 10 GHz and its up to 30 GHz. By modeling the coupling channel, recovers sensitivity independent aggressing rate amplitude fluctuations. A variable phase rotator, comb generator, modulator are used achieve cancellation. use generator novel enables harmonic Over 25 dB...

This paper presents the first fully integrated mixed-signal demodulator incorporating ultra low-power 3mW 3Gsps 3-bit ADCs and a 2mW high-speed real-time digital signal processing in 90nm CMOS that requires neither external synchronization controls nor to demodulate up 3.5Gbps binary phase-shift keying (BPSK) modulated signal. The is with IQ mixers, 13GHz QVCO, frequency synthesizers baseband AGC, for an overall power consumption of 60mW from 1V supply. entire chip occupies 1.275×1.19mm <sup...

In this paper, a low-power high-speed fully integrated mixed-signal quadrature demodulator with an embedded multi-gigabit modem in 90 nm CMOS technology is presented. A wide dynamic-range automatic gain control (AGC) implemented to avoid clipping distortion experienced by the baseband ADCs. By reusing power detector circuit within AGC, analog signal processor introduced recover OOK modulated signals up 2.5 Gb/s for additional consumption of 7.5 mW. Integrated ultra-low-power, 3 mW, GS/s,...