A5078369967- Advanced Surface Polishing Techniques
- Semiconductor materials and devices
- Diamond and Carbon-based Materials Research
- ZnO doping and properties
- Perovskite Materials and Applications
- Copper Interconnects and Reliability
- Electronic and Structural Properties of Oxides
- Minerals Flotation and Separation Techniques
- Surface Modification and Superhydrophobicity
- Metal Extraction and Bioleaching
University of North Carolina at Chapel Hill
2025
Lewis University
2022-2023
Semiconductor devices often rely on high-purity materials and interfaces achieved through vapor- vacuum-based fabrication methods, which can enable precise compositional control down to single atomic layers. Compared groups IV III–V semiconductors, hybrid perovskites (HPs) are an emergent class of semiconductor with remarkable solution processability variability that have facilitated rapid experimentation achieve new properties progress toward efficient devices, particularly for solar cells....
Semiconductor photoelectrodes are regularly coupled to solid-state heterogeneous catalysts perform solar-driven reduction of CO2. Less frequently, molecular employed better control the reactivity toward desired products, yet development robust semiconductor/molecule interfaces has proven challenging. Here, we demonstrate that a 2-3 nm thermal oxide layer on Si exhibits stability in aqueous solution, high photovoltage, and photocurrent density ∼10 mA/cm2 for photoelectrochemical homogeneous...
As transistor miniaturization continues to extend Moore’s Law into the future of technology, demand for high-efficiency device manufacturing processes has increased drastically in recent years. More specifically, a critical step preparing integrated circuits (ICs) and logic devices is Chemical Mechanical Planarization (CMP), which relies on delicate balance chemical mechanical parameters achieve angstrom-level surface uniformity ultimately allows packing density. A sub-area CMP that gained...
The Chemical Mechanical Planarization (CMP) process (polishing and substrate cleaning) results in defects that can be classified as mechanical (i.e., scratching), chemical corrosion), or physiochemical adsorbed contaminants) according to the mechanism of formation. This work will focus on rationale design p-CMP cleaning systems for emerging materials (silicon carbide (SiC)) activate chemistry via external stimuli such megasonic energy. More specifically, using energy presence supramolecular...
Wide band gap (WBG) materials (i.e. Silicon Carbide (SiC)) are rapidly emerging in the semiconductor arena because of their properties high capacitance, thermal stability, and wear resistance), which allow these substrates to be used as insulating wafers transistors integrated circuits (IC). During CMP, removable defects particles, organic residues, pad debris etc.) non-removable scratches or corrosion) generated on wafer surface. Industry standards currently utilize aggressive post-CMP...
As integrated circuits (ICs) and logic devices continue to shrink according Moore’s Law, the demand for enhanced Chemical Mechanical Planarization (CMP) processes has increased dramatically. More specifically, an area that gained tremendous attention is Shallow Trench Isolation (STI) CMP. The process of STI involves electrical isolation active components require exposure by removing bulk oxide (i.e., TEOS) overburden from deposition process. Traditional slurry formulations are comprised a...