Nabil Imam

ORCID: 0000-0003-2143-2286
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About
Contact & Profiles
Research Areas
  • Advanced Memory and Neural Computing
  • Neural dynamics and brain function
  • Neuroscience and Neural Engineering
  • Ferroelectric and Negative Capacitance Devices
  • Neural Networks and Reservoir Computing
  • Neural Networks and Applications
  • Advanced Chemical Sensor Technologies
  • Olfactory and Sensory Function Studies
  • Neurobiology and Insect Physiology Research
  • CCD and CMOS Imaging Sensors
  • Functional Brain Connectivity Studies
  • Visual perception and processing mechanisms
  • Cell Image Analysis Techniques
  • Single-cell and spatial transcriptomics
  • Guidance and Control Systems
  • Medical Image Segmentation Techniques
  • Quantum-Dot Cellular Automata
  • Insect Pheromone Research and Control
  • Robotics and Sensor-Based Localization
  • Explainable Artificial Intelligence (XAI)
  • Image Retrieval and Classification Techniques
  • Robotic Path Planning Algorithms
  • Traffic Prediction and Management Techniques
  • Advanced Fluorescence Microscopy Techniques
  • Neural Networks Stability and Synchronization

Georgia Institute of Technology
2024

Yale University
2020-2021

Intel (United States)
2018-2020

Cornell University
2011-2016

IBM Research - Almaden
2012-2015

Trinity College Dublin
2008

Oak Ridge National Laboratory
2005

Inspired by the brain's structure, we have developed an efficient, scalable, and flexible non-von Neumann architecture that leverages contemporary silicon technology. To demonstrate, built a 5.4-billion-transistor chip with 4096 neurosynaptic cores interconnected via intrachip network integrates 1 million programmable spiking neurons 256 configurable synapses. Chips can be tiled in two dimensions interchip communication interface, seamlessly scaling to cortexlike sheet of arbitrary size. The...

10.1126/science.1254642 article EN Science 2014-08-07

Loihi is a 60-mm2 chip fabricated in Intels 14-nm process that advances the state-of-the-art modeling of spiking neural networks silicon. It integrates wide range novel features for field, such as hierarchical connectivity, dendritic compartments, synaptic delays, and, most importantly, programmable learning rules. Running convolutional form Locally Competitive Algorithm, can solve LASSO optimization problems with over three orders magnitude superior energy-delay-product compared to...

10.1109/mm.2018.112130359 article EN IEEE Micro 2018-01-01

The new era of cognitive computing brings forth the grand challenge developing systems capable processing massive amounts noisy multisensory data. This type intelligent poses a set constraints, including real-time operation, low-power consumption and scalability, which require radical departure from conventional system design. Brain-inspired architectures offer tremendous promise in this area. To end, we developed TrueNorth, 65 mW neurosynaptic processor that implements non-von Neumann,...

10.1109/tcad.2015.2474396 article EN IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 2015-08-28

The grand challenge of neuromorphic computation is to develop a flexible brain-like architecture capable wide array real-time applications, while striving towards the ultra-low power consumption and compact size human brain-within constraints existing silicon post-silicon technologies. To this end, we fabricated key building block modular architecture, neurosynaptic core, with 256 digital integrate-and-fire neurons 1024×256 bit SRAM crossbar memory for synapses using IBM's 45nm SOI process....

10.1109/cicc.2011.6055294 article EN 2022 IEEE Custom Integrated Circuits Conference (CICC) 2011-09-01

The grand challenge of neuromorphic computation is to develop a flexible brain-inspired architecture capable wide array real-time applications, while striving towards the ultra-low power consumption and compact size biological neural systems. Toward this end, we fabricated building block modular architecture, neurosynaptic core. Our implementation consists 256 integrate-and-fire neurons 1,024×256 SRAM crossbar memory for synapses that fits in 4.2mm <sup...

10.1109/ijcnn.2012.6252637 article EN 2022 International Joint Conference on Neural Networks (IJCNN) 2012-06-01

Drawing on neuroscience, we have developed a parallel, event-driven kernel for neurosynaptic computation, that is efficient with respect to memory, and communication. Building the previously demonstrated highly optimized software expression of kernel, here, demonstrate True North, co-designed silicon kernel. North achieves five orders magnitude reduction in energy to-solution two speedup time-to solution, when running computer vision applications complex recurrent neural network simulations....

10.1109/sc.2014.8 article EN 2014-11-01

Neuromorphic computing applies insights from neuroscience to uncover innovations in technology. In the brain, billions of interconnected neurons perform rapid computations at extremely low energy levels by leveraging properties that are foreign conventional systems, such as temporal spiking codes and finely parallelized processing units integrating both memory computation. Here, we showcase Pohoiki Springs neuromorphic system, a mesh 768 Loihi chips collectively implement 100 million...

10.1145/3381755.3398695 article EN 2020-03-17

We present a biomimetic system that captures essential functional properties of the glomerular layer mammalian olfactory bulb, specifically including its capacity to decorrelate similar odor representations without foreknowledge statistical distributions analyte features. Our is based on digital neuromorphic chip consisting 256 leaky-integrate-and-fire neurons, 1024x256 crossbar synapses, and AER communication circuits. The neural circuits configured in reflect established connections among...

10.3389/fnins.2012.00083 article EN cc-by Frontiers in Neuroscience 2012-01-01

We design and implement a key building block of scalable neuromorphic architecture capable running spiking neural networks in compact low-power hardware. Our innovation is configurable neurosynaptic core that combines 256 integrate-and-fire neurons, 1024 input axons, 1024×256 synapses 4.2mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> silicon using 45nm SOI process. are able to achieve ultra-low energy consumption 1) at the...

10.1109/async.2012.12 article EN 2012-05-01

Significance There exists a curious lacuna in our understanding of the development and evolution cortical areas brain. Whereas massive research effort has focused on primary sensory motor areas, few such studies higher have been done, particularly at earliest stages development. In parallel, there intense interest interpretation across species, how new larger brains emerge. Using network model developing cortex, we show here that may be natural outcome regularly scaling brains, arising as...

10.1073/pnas.2011724117 article EN Proceedings of the National Academy of Sciences 2020-11-02

We present a novel Address-Event Representation (AER) transmitter circuit to communicate pulses of neural activity (spikes) within neuromorphic system. AER circuits allow an ensemble neurons achieve large scale time-multiplexed connectivity through shared communication channel. Our design makes use token-ring mutual exclusion where two circulating tokens in 2D array provide exclusive access the Compared traditional arbitration-tree-based designs, our has higher throughput and lower latency...

10.1109/async.2011.20 article EN 2011-04-01

We implement a digital neuron in silicon using delay-insensitive asynchronous circuits. Our design numerically solves the Izhikevich equations with fixed-point number representation, resulting compact and energy-efficient variety of dynamical characteristics. A implementation results stable, reliable highly programmable circuits, while an style leads to clockless neurons their networks that mimic event-driven nature biological nervous systems. In 65 nm CMOS technology at 1 V operating...

10.1109/ijcnn.2013.6706952 article EN 2022 International Joint Conference on Neural Networks (IJCNN) 2013-08-01

Progress in VLSI technologies is enabling the integration of large numbers spiking neural network processing modules into compact systems. Asynchronous routing circuits are typically employed to efficiently interface these modules, and configurable memory usually used implement synaptic connectivity among them. However, supporting arbitrary with conventional methods would require prohibitively resources. We propose a two stage scheme which minimizes requirements needed scalable...

10.1109/ecctd.2013.6662203 article EN 2013-09-01

Q is an unmanned ground vehicle designed to compete in the Autonomous and Navigation Challenges of AUVSI Intelligent Ground Vehicle Competition (IGVC). Built on a base platform modified PerMobil Trax off-road wheel chair frame, running off Dell Inspiron D820 laptop with Intel t7400 Core 2 Duo Processor, gathers information from SICK laser range finder (LRF), video cameras, differential GPS, digital compass localize its behavior map out navigational path. This handled by intelligent closed...

10.1117/12.807650 article EN Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE 2008-11-20

10.1038/s42256-021-00391-2 article EN Nature Machine Intelligence 2021-09-17

We present an end-to-end architecture for embodied exploration inspired by two biological computations: predictive coding and uncertainty minimization. The can be applied to any setting in a task-independent intrinsically driven manner. first demonstrate our approach maze navigation task show that it discover the underlying transition distributions spatial features of environment. Second, we apply model more complex active vision task, whereby agent actively samples its visual environment...

10.1016/j.patter.2024.100983 article EN cc-by-nc-nd Patterns 2024-05-03

Analysis of brain volumes across mammalian taxonomic groups reveal a pattern complementary and inverse covariation between major components, including robust negative the limbic system neocortex. To understand computational basis this covariation, we investigated multidimensional representational space task-optimized machine learning systems. We found that smooth mapping onto two-dimensional surface leads to characteristic layout depending on structure its information source. Visual,...

10.1101/2024.11.19.624321 preprint EN cc-by-nc-nd bioRxiv (Cold Spring Harbor Laboratory) 2024-11-19

Dennler et al. submit that they have discovered limitations affecting some of the conclusions drawn in our 2020 paper, Rapid online learning and robust recall a neuromorphic olfactory circuit. Specifically, assert (1) public dataset we used suffers from sensor drift nonrandomized measurement protocol, (2) EPL network is limited its ability to generalize over repeated presentations an odorant, (3) results can be performance matched by using more computationally efficient distance measure....

10.48550/arxiv.2411.10456 preprint EN arXiv (Cornell University) 2024-11-01

Deep learning has revolutionized many fields, but caused the 'black-box' problem, where model prediction is not interpretable and transparent. Explainable Artificial Intelligence (XAI) attempts to overcome this problem with help of Interpretability Transparency in AI systems. We review important XAI methods focusing on LIME, SHAP saliency maps that explain elements behind predictions. The paper discusses about role high-stake fields such as healthcare, finance autonomous systems, emphasizing...

10.9790/0661-2606012936 article EN IOSR Journal of Computer Engineering 2024-11-27

On-chip AER serialization is a required step for the successful integration of event-driven neuromorphic devices on complex robotic platforms. We propose an architecture and its implementation AMS 180nm technology, synthesised with Quasi-Delay Insensitive design principles minimum timing assumptions. The 19 bits completes in 70ns average power consumption 2.34mW.

10.1109/iscas.2015.7169246 article EN 2022 IEEE International Symposium on Circuits and Systems (ISCAS) 2015-05-01

One of the most important features artificial neural networks in emerging, brain-inspired, nanoarchitectural design is their inherent ability to perform massively parallel, nonlinear signal processing. When operating a system-wide asynchronous regime, such may exhibit phenomenon referred as "computational chaos", which impedes efficient retrieval information usually stored system's attractors. We illustrate emergence computational chaos from fixed point and limit cycle attractors for node...

10.1109/ijcnn.2004.1380916 article EN 2005-01-31
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