Wide-issue ILP machines can be built using the VLIW approach as many of hardware complexities found in superscalar processors transferred to compiler. However, scalability architectures is still constrained by size and number ports register file required a large functional units. Organizations composed clusters few units small private files have been proposed deal with this problem; an highly dependent on scheduling partitioning strategies. The paper presents DMS, algorithm that integrates...

This paper presents a vision system to be embedded in mobile robot, both of them implemented using reconfigurable computing technology. The captures gestures by means digital color camera, and then performs some pre-processing steps order use the image as input RAM-based neural network. set recognized can defined on-chip training capabilities. All above functionality has been single FPGA chip. Experimental results have shown robust, with enough performance meet real-time constraints (30...

This paper presents results on a new approach to partitioning modulo-scheduled loop for distributed execution parallel clusters of functional units organized as VLIW machine. A distinctive characteristic this architecture is the use register files by means queues, which in number advantages over conventional schemes, but also requires development specific compiling and hardware features. We have investigated scheme based copy operations deal with data values be consumed more than once during...

An increasing interest in the design of mobile robots has been observed recent years, which is mainly motivated by technological advances that may allow their application to consumer markets, addition industrial areas.Although sophisticated techniques have developed, choosing appropriate hardware-software partitioning and programming robot functions are still very complex tasks.Current approaches often involve implementation hardwired solutions, with associated problems a long development...

This paper presents a smart camera for real-time gesture recognition system. The has been designed and implemented as system-on-a-chip (SoC), using reconfigurable computing technology. In this system the images are captured by means of CMOS digital camera. After some pre-processing steps, those sent to fault tolerant module (FTM) actual process. FTM implements RAM-based neural network, three knowledge bases. addition, majority voting technique is used improve confidence level in step. A...

The very nature of universities makes them unique environments for research and teaching. Although both activities constantly borrow from each other, a deeper level interaction is not always achieved several reasons. This paper presents successful experience on conducting an undergraduate course embedded systems, based strong with related previously conducted by the authors. Known being everywhere, systems are expanding in complexity volume production. In addition, heterogeneous becoming...

This paper describes an alternative approach to direct mapping loops described in high-level languages onto FPGAs. Different from other approaches, this technique does not inherit software pipelining techniques. The control is distributed over operations, thus a finite state machine necessary the order of allowing efficient hardware implementations. specification block done by means LALP, domain specific language specially designed help application While syntax resembles C, it contains...

X-rays emitted by the Sun can damage electronic devices of spaceships, satellites, positioning systems and electricity distribution grids. Thus, forecasting solar is needed to warn organizations mitigate undesirable effects. Traditional mining classification methods categorize observations into labels, we aim extend this approach predict future X-ray levels. Therefore, developed “SeMiner” method, which allows prediction events. processes sequences employing a new algorithm called...

This paper presents the use of LALP to implement typical industrial application kernels, ADPCM Encoder and Decoder, in FPGAs. is a domain specific language its compilation framework aims direct mapping algorithms originally described high-level onto In particular, focuses on loop pipelining, key technique for design hardware accelerators. While syntax resembles C, it contains certain constructs that allow programmer interventions enforce or relax data dependences as needed, so optimize...

Field-Programmable Gate Arrays (FPGAs) are becoming increasingly important in embedded and high-performance computing systems. They allow performance levels close to the ones obtained from Application-Specific Integrated Circuits (ASICs), while still keeping design implementation flexibility. However, efficiently program FPGAs, one needs expertise of hardware developers master description languages (HDLs) such as VHDL or Verilog. The attempts furnish a high-level compilation flow (e.g., C...

This paper proposes a technique for the generation of disparity map from real scene, captured by stereo vision system.The underlying motivation this work is to develop system not requiring use calibration pattern, which usually involves manual intervention.This well-desired feature allow its in real-life environments, e.g., helping people with severe visual impairment or blindness navigate through open spaces.Experimental results showed that developed has level effectiveness similar other...

Practice has shown that programming a new multicore system is greater challenge than previously thought. The to produce the resulting in way, which as easy sequential programming. This trend changed way we think about whole development process. aim of this work show it possible develop embedded application using existing tools, while at same time, obtaining reuse. process carried out cyclic and increasing manner, generating more refined version each iteration. consists five phases: Multitask...

Although embedded systems have been around for quite a long time, just in recent years they attracted major industry and academic interest. There is perception that computing paradigm shift taking place, so the need to provide computer science students with required expertise field. In this paper we describe our experience of using reconfigurable platform throughout number courses. By doing allow get acquired concepts practices under different contexts normal curriculum. The application...

Image processing applications are well established in modern society, presenting continuous advances and challenges. One of its fundamental techniques is morphological image processing, a nonlinear branch which have high performance requirements. Although usually demanding for general purpose processors, it presents degree achievable parallelism, making FPGA based platforms suitable candidates this task. However, ad-hoc implementations specialized functions to be applied images varying...

Image processing is a vast field of research and extremely important for large number applications such as security systems, geoprocessing, medical technologies, etc. There are some that require higher level processing, requiring computing power. As an example this requirement in image morphological filtering with filter chains involving erosion dilation may be used. This study aims to discuss the advantages disadvantages between running these software context, using personal computer,...

This paper presents LALPC, a prototype high-level synthesis tool, specialized in hardware generation for loop-intensive code segments. As demonstrated previous work, the underlying components target by LALPC are highly loop pipeline execution, resulting efficient implementations, both terms of performance and resources usage (silicon area). extends functionality tool using subset C language as input to describe computations, improving usability potential acceptance technique among...

This paper presents CHAOS-MCAPI (Communication Header and Operating Support-Multicore Communication API), an IPC mechanism targeting parallel programming based on message passing multicore platforms. The proposed is built top of the D-Bus protocol for transmission, which allows a higher abstraction level control when compared to lower-level mechanisms such as UNIX Pipes. Optimizations adopted by implementation resulted in significant performance gains relation original implementation, should...