This work presents a numerical analysis of 2.45 GHz full-wave bridge rectifier for RF (radio frequency) energy harvesting under low-power input conditions, and guideline developing figure merit (FOM) harvester rectennas by relying on data science techniques, laying the foundation universally accepted FOM. The performance rectifier, using two types Schottky diodes, HSMS2850 SMS7630, was evaluated at −5 −15 dBm, with diodes achieving maximum power conversion efficiencies (PCEs) 57% 33%,...

This paper focuses on the time-domain analysis of bandpass (BP) negative group delay (NGD) function. The innovative NGD investigation is based experimentation an topology "lill"-shape passive microstrip circuit. design principle proof concept (POC) constituted by particular shapes described. circuit inspired from a recent fully distributed "li"-topology. Before investigation, BP specifications under study are academically defined. As practical application basic definition, frequency domain...

Abstract The negative group delay (NGD) is one of less familiar electronic functions. So far, the time domain (TD) experimentation NGD circuits remains a challenging task. This paper investigates an innovative TD measurement band‐pass (BP) passive circuit. topology considered BP distributed circuit constituted by transmission line structure having 101O‐geometrical shape introduced. After design description 101O‐structure, response illustrates from simulation and based on S‐parameters. center...

This brief studies a new resistive-capacitive (RC) topology of low-pass (LP) negative group delay (NGD) circuit. The innovative circuit theory includes the LP-NGD analysis and characterization from transfer function canonical form versus targeted time-advance attenuation specifications. properties in both frequency- time-domains are introduced. NGD value (or time-advance) cut-off frequency RC parameters, synthesis formulas established. is graphically illustrated by cartography analyses...

In this article, a time-domain test on the negative group delay behavior of double-Li-structure microstrip circuit is proposed. The feasibility validated experimentally using Gaussian envelopes modulating sine carrier frequencies inside and outside frequency bands.

Abstract Most of the recent studies on unfamiliar negative group delay (NGD) circuit were focused classes low‐pass (LP) and bandpass (BP) topologies. So far, few research works are currently available in literature high‐pass (HP) NGD class. This paper introduces an original HP‐NGD theory four‐port passive topology constituted by a single lumped capacitor. The S‐matrix equivalent model innovative is established from admittance matrix. basic analytical frequency‐dependent responses expressed....

A transient study of bandpass (BP) negative group delay (NGD) function is devoted in this paper. The analysis applied to an original topology NGD barcode-shape microstrip circuit. performed investigation explains how realize the tri-band time-domain (TD) parametrization test established from BP-NGD specifications circuit under (CUT) based on S-parameter model. input signal a Gaussian pulse characterized bandwidth (BW) and center frequency. feasibility illustrated with experimentation...

The charge pump phase locked loop (CP-PLL) is widely used subsystem in modern mixed-signal electronic systems that are utilized digital and wireless applications such as clock generation, synchronization frequency synthesis. In the classical mode, combination of a current switched detector (CP-PFD) circuits produces an ideal pulse width modulated constant during one sampling period, which permits suitable transient performance. Nevertheless, many commercially CP-PLL chips (e.g., 4046 family)...

A digitally controlled oscillator (DCO) suitable for multi-standards radio-frequency (RF) operation is presented. It has an LC topology using active inductor based on CMOS controllable inverters. The tunability of the frequency ensured by varying digital word applied to inverters’ control voltages. proposed DCO a small area and exhibits high-frequency tuning range while achieving low power consumption with good stability against process variations.

The miniaturization and application development are the expected challenges on today engineering design research bandpass (BP) type negative group delay (NGD) circuit. To overcome this technical limit, an innovative contribution integrated circuit (IC) method of BP-NGD to constant phase shifter (PS) in 130-nm BiCMOS technology is developed present paper. PS microwave passive IC topologically consisted cascade CLC- RLC-resonant networks. After S-matrix modelling, synthesis equations enabling...

This paper presents a novel design and an optimization methodology of ultra-low power low phase noise RF voltage controlled oscillator (VCO). VCO is based on PMOS-NMOS cross-coupled topology operating in the subthreshold region. An adaptive body biasing technique presented this circuit leading to high immunity PVT (P=Process, V=Voltage, T=Temperature) variations. The VCO, implemented 130nm CMOS technology, consumes only 63 μW under 0.6 V. obtained tuning range about 7.2% from 2.32 GHz 2.495...

An ultra low power and voltage down conversion mixer is presented in this paper for the frequency band of 1.8–2.4 GHz. Designed 0.18μm CMOS technology, double balanced proposed composed by two cascaded stages. The first one based on cross coupled capacitors technique current reused topology providing a high gain, while second employs transducer to LO driven inverters perform conversion. All devices operate moderate inversion better trade-off between linearity, consumption. post layout...

The design and implementation of a CMOS integrated analog to digital interface dedicated hybrid integration MEMS resistive microphone is presented. Audio sensing achieved with an innovative low-cost technology that uses single crystal piezoresistive silicon nanowires as transducer in MEMS. circuit composed low-noise instrumentation preamplifier followed by bit fourth order continuous-time sigma-delta modulator (CT-ΣΔM) includes bias for sensor. To join low power applications where extensive...

This article presents the design and implementation of a multi-stage radio-frequency (RF) passive polyphase filter (PPF). The layout parasitics mismatch which deteriorate significantly RF performance are analyzed modeled. To reduce this parasitic degradation, novel optimal technique is proposed. It based on reproducing same optimized PPF stage for different stages while desired bandwidth ensured due to an sizing inter-stages connections. approach has been validated with chip measurements....

Optimization of CMOS circuits is essential to reduce power consumption and improve phase noise performance. A novel method optimize voltage-controlled oscillator VCO proposed using a current reuse technique. In this paper, three topology for 2.4 GHz application are designed in 0.13μm process simulated Cadence Spectre. The improvement the described analyzed. traditional with tuning range 14.8% presented first topology. It consumes about 0.267mW from 1V supply voltage. For second topology,...

An original application of stopband (SB) type negative group delay (NGD) electronic function is introduced.The unfamiliar SB-NGD circuit designed with RLC-network lumped passive topology.The exploited to operate as a true-time (TTD) device for smart dualbeam phased array design.The two-port topology designing an constituted by described.The theory and design method the employed are detailed.The microwave elaborated from S-matrix modelling.The canonical form innovatively introduced in...

The purpose of this paper is to study the RF/microwave constant phase shift (CPS) designed as an integrated circuit (IC) in 130-nm Bi-CMOS technology.The CPS understudy constituted by a bandpass (BP) negative group delay (NGD) passive cell combined cascade with positive (PGD) circuit.The real represented CLC-network associated BP-NGD cell.The characterization based on S-parameter modelling.The analytically modeled frequency independent transmission modelling mathematical relation φby...

Polyphase filters are an efficient solution for high image rejection and great accuracy quadrature generation in radio frequency (RF) receivers. Analytical modeling of passive polyphase filter suitable RF front-end applications operating 2.4 GHz band is dealt with. This analytical analysis has been used to calibrate the optimal values components order obtain maximum ratio (IRR). Component matching techniques taken into account during layout process. Tunable RC network fabricated 0.13-mum...

A design methodology of CMOS LC voltage-controlled oscillator (VCO) is proposed in this paper. The relation between components and specifications the LC-VCO studied to easily identify its trade-offs. This has been applied ultra-low-power LC-VCOs for different frequency bands. An based on current reuse technique realized with 0.13[Formula: see text][Formula: text]m process. Measurements present an ultra-low power consumption only 262[Formula: text]W drawn from 1[Formula: text]V supply...

The GARDNER's stability theory is vital for linear modeling and empirical design of the 2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">nd</sup> 3 xmlns:xlink="http://www.w3.org/1999/xlink">rd</sup> order charge-pump phase locked loop (CP-PLL). This criterion general to identify boundary in steady state. It has been particularly applied PLL with a conventional current switched (CSCP). Ideally, CSCP supplies symmetrical pump currents. In some...

A radio-frequency front-end receiver, based on double-quadrature architecture within polyphase filters to achieve high image rejection ratio (IRR), is proposed in this paper. tunable filter topology that allows counteracting the process spread and frequency drifts dealt with. The 2.4GHz front-end, implemented 130nm standard CMOS technology, ensures more than 60dB IRR good linearity applications.