- Physical Unclonable Functions (PUFs) and Hardware Security
- Cryptographic Implementations and Security
- Formal Methods in Verification
- VLSI and Analog Circuit Testing
- Advanced Malware Detection Techniques
- Neuroscience and Neural Engineering
- Chaos-based Image/Signal Encryption
- Brain Tumor Detection and Classification
- Embedded Systems Design Techniques
- Integrated Circuits and Semiconductor Failure Analysis
- Mobile Ad Hoc Networks
- Natural Language Processing Techniques
- CCD and CMOS Imaging Sensors
- Real-time simulation and control systems
- Vehicular Ad Hoc Networks (VANETs)
- Semiconductor Lasers and Optical Devices
- Security and Verification in Computing
- Cloud Computing and Resource Management
- Real-Time Systems Scheduling
- Advancements in PLL and VCO Technologies
- Neural Networks and Applications
- Low-power high-performance VLSI design
- Advanced Steganography and Watermarking Techniques
- Advanced Memory and Neural Computing
- Indian Economic and Social Development
LNM Institute of Information Technology
2014-2024
Chandigarh University
2017-2024
Gurugram University
2023
Shree Guru Gobind Singh Tricentenary University
2023
Girls Incorporated
2023
Vivekananda Global University
2021
Benchmark Research (United States)
2018
Noida International University
2018
Indian Institute of Information Technology Allahabad
2013
Indian Institute of Science Bangalore
2008-2010
In a Wireless Sensor Network (WSN), aggregation exploits the correlation between spatially and temporally proximate sensor data to reduce total volume be transmitted sink. Mobile agents (MAs) fit into this paradigm, can aggregated collected by an MA from different nodes using context specific codes. The MA-based collection suffers due large size of typical WSN is prone security problems. article, homomorphic encryption in clustered has been proposed for secure efficient MAs. keep encrypted...
This paper presents the ADPLL design using Verilog and its implementation on FPGA. is designed HDL. Xilinx ISE 10.1 Simulator used for simulating Code. gives details of basic blocks an ADPLL. In this paper, described in detail. Its simulation results are also discussed. It FPGA vertex5 xc5vlx110t chip results. The 200 kHz central frequency. operational frequency range 189 Hz to 215 kHz, which lock design.
Data protection is a severe constraint in the heterogeneous IoT era. This article presents Hardware-Software Co-Simulation of AES-128 bit encryption and decryption for Edge devices using Xilinx System Generator (XSG). VHDL implementation algorithm done with ECB CTR mode loop unrolled FSM-based architecture. It found that AES-CTR FSM architecture performance better than lesser power consumption area. For performing on Zedboard Kintex-Ultra scale KCU105 Evaluation Platform, Vivado 2016.2...
Currently, the textile industry is among most rapidly expanding areas of economy and an important source water pollution. There are many efficient chemical physical methods for treating effluent, but they produce secondary pollutants. Therefore, there a need to manage waste wastewater. The potential EPS-producing plant growth-promoting rhizobacteria Lysinibacillus capsici PB300 (T) bacteria strain has been isolated from bark borer-affected Peltophorum pterocarpum determined be effective in...
Background: Dengue affects 390 million people yearly. 70% global disease burden is from Asia. Every fourth person infected with dengue get sick and about one in 20 develop severe dengue. Aim of this study was to assess the knowledge practice women regarding rural area Meerut, U.P. Methods: A descriptive survey done conduct study. Multistage random sampling used select participants. Data has been collected 50 Self-developed questionnaire checklist prepared measure practices practices. Result:...
Nowadays, integrated circuits (ICs) security grown as a primary responsibility at every stage of IC supply chain due to the globalized design, fabrication, test, deployment and monitoring an IC. In this regard, Advanced Encryption Standard (AES) is widely accepted supported in both domain, software well hardware. To diminish effect cause different threats, researchers identified that hardware obfuscation based AES promising technique solution towards piracy reverse engineering. This paper...
Security of the data is a major challenge in deployment and management Internet Things (IoT) systems heterogeneous environment, where gets transferred very widely rapidly multiple modes across globe. Concomitant with advancement technology, number devices which are involved transferring image has increased IoT environment. At present, processing have become an integral part edge can collect images automatically share network. Because multifaceted usage multimedia applications it essential to...
An extension to a formal verification approach of hybrid systems is proposed verify analog and mixed signal (AMS) designs. AMS designs can be formally modeled as therefore lend themselves the analysis techniques applied systems. The employs simulation traces obtained from an actual design implementation circuit blocks (for example, in form SPICE netlists) carry out verification. This enables same platform used for validating abstract model design, also its different refinements...
With the rapid advancement of communication technology, secure data transfer has become primary concern for every system. Advanced Encryption Standard (AES) been proved to be useful and effective providing high security image processing applications. In this paper, Active Fixed Hardware Obfuscation based 128-bit AES algorithm is proposed improving aspects transfer. The method adopts classic framework Xilinx System Generator (XSG) which uses Vivado 2016.2 MATLAB 2015b. Software Co-simulation...
With the continuous evolution of global internet, security exchanging information has become increasingly serious. Many malicious entities can retrieve valuable via an unsecured medium. In this regard, Elliptic Curve Cryptography (ECC) is widely accepted and attractive choice for encrypting information. researchers have studied ECC indicated as one most secure cryptographic algorithms. This paper discusses design implementation Text Encryption using over 192 bit prime Field on FPGA. The...
In this paper we present a verification approach for MEMS based hybrid system. The system is an adaptive cruise controller (ACC) involving gyroscope speed measurement, the motion control of platoon cars. A transformation to obtain continuous time solution states presented. This then integrated into Simulink/Stateflow (SS) tool framework from MathWorks Inc., where validation ACC carried out using simulation on differential equation and analytical function domain dynamic behavior. We also show...
QR codes, intended for maximum accessibility are widely in use these days and can be scanned readily by mobile phones. Their ease of makes them vulnerable to attacks tampering. Certain scenarios require a code accessed group users only. This is done making the cryptographically secure with help password (key) encryption decryption. Symmetric key algorithms like AES requires sender receiver have shared secret key. However, whole motive security fails if not enough. Therefore, our design we...
In today's world, globalization of semiconductor industry leads to piracy and overbuilding integrated circuits (ICs) making it accessible for untrustworthy elements insert hardware trojans. The solution this problem is logic obfuscation which used encrypt the design by inserting additional gates so that valid output produced only when key applied these gates. This paper discusses analysis based 128-bit AES algorithm. algorithm designed simulated using Xilinx Vivado 2016.2. Results show with...
Cryptography is used for securing sensitive information from unauthorized access. A cryptochip needs to be tested so as ensure its functionality. Scan based testing the most popular technique employed purposes, however, such of cryptochips can lead retrieval secret stored inside them by exploiting scan chain structure known side channel attack. Thus, it becomes crucial guarantee security while maintaining capabilities. In this paper, we have proposed two schemes securely test AES inserting a...
In this paper, we propose an extension to the formal verification approach of hybrid systems verify Tunnel Diode Oscillator (TDO) with temperature variations. This enables same platform that is used for validating system, be also formally The proposed utilizes simulation traces from actual implementation analog circuits carry out analysis and verification. We demonstrate our around Checkmate [1] diode as a case study. Current-Voltage simulations were performed on tunnel basic feature I-V...
Summary In semiconductor industry, reusability‐based System‐on‐Chip architecture using hardware intellectual property (IP) cores play a prominent role in Internet‐of‐Things (IoT) applications for secure data transmission. The advent of IoT makes it possible physical things to transmit, process, compute, and receive over internet. But, also introduces in‐device communication security vulnerabilities. Advanced Encryption Standard (AES) IP has been used address vulnerabilities IoT. It is an...
Large language models (LLMs) demonstrated transformative capabilities in many applications that require automatically generating responses based on human instruction. However, the major challenge for building LLMs, particularly Indic languages, is availability of high-quality data foundation LLMs. In this paper, we are proposing a large pre-train dataset Hindi useful Hindi. We have collected span across several domains including dialects The contains 1.28 billion tokens. explained our...
Background: Approximately 30 to 50% works exposed occupational health hazard and 120 million workers become victim in 200000 fatalities annually. Aim of the study was assess knowledge attitude practice employees regarding prevention hazards a selected sugar mill Uttar Pradesh. Methods: A descriptive survey done on co-operate Baghat. Data has been taken from working machine field areas. 100 participants had chosen using convenient sampling technique. Structured questionnaire developed...