Debjit Pal

ORCID: 0000-0003-3722-5126
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About
Contact & Profiles
Research Areas
  • Semiconductor Quantum Structures and Devices
  • VLSI and Analog Circuit Testing
  • Integrated Circuits and Semiconductor Failure Analysis
  • Semiconductor materials and interfaces
  • Software Testing and Debugging Techniques
  • Embedded Systems Design Techniques
  • Radiation Effects in Electronics
  • Software Engineering Research
  • Advanced Semiconductor Detectors and Materials
  • Parallel Computing and Optimization Techniques
  • Semiconductor materials and devices
  • Interconnection Networks and Systems
  • VLSI and FPGA Design Techniques
  • Mathematical and Theoretical Epidemiology and Ecology Models
  • Low-power high-performance VLSI design
  • Advanced Malware Detection Techniques
  • Evolution and Genetic Dynamics
  • Software Reliability and Analysis Research
  • Formal Methods in Verification
  • Physical Unclonable Functions (PUFs) and Hardware Security
  • Quantum Dots Synthesis And Properties
  • Surface and Thin Film Phenomena
  • Cryptographic Implementations and Security
  • Silicon Nanostructures and Photoluminescence
  • UAV Applications and Optimization

Jadavpur University
2019-2025

University of Illinois Chicago
2024

Cornell University
2020-2022

University of Kalyani
2022

University of Illinois Urbana-Champaign
2013-2019

University of Engineering & Management
2018

Institute of Engineering
2018

University of Illinois System
2018

Indian Institute of Technology Bombay
2015

Indian Institute of Technology Kharagpur
1985-2012

Modern heterogeneous FPGA architectures incorporate a variety of hardened blocks for boosting the performance arithmetic-intensive designs, such as DSP and carry blocks. Since can be configured in different ways, datapath patterns mapped into these We observe that existing high-level synthesis (HLS) tools often fail to capture some operation mapping patterns, leading limited estimation accuracy terms resource usage delay. To address this deficiency, we propose exploit graph neural networks...

10.1145/3400302.3415657 article EN 2020-11-02

High-level synthesis (HLS) can greatly facilitate the description of complex hardware implementations, by raising level abstraction up to a classical imperative language such as C/C++, usually augmented with vendor-specific pragmas and APIs. Despite productivity improvements, attaining high performance for final design remains challenge, higher-level tools like source-to-source compilers have been developed generate programs targeting HLS toolchains. These may highly HLS-ready C/C++ code,...

10.1145/3626202.3637563 article EN 2024-04-01

The present study analyzes an intraguild predation model, which combines with competition. This model has food webs a fundamental three-species structure in two populations are associated not only by prey–predator relationships but also the competition between them for common prey. growth of prey is assumed to follow Smith function, and self-diffusion taken into consideration under zero-flux boundary condition. feasible equilibria their stability temporal system explained. positive steady...

10.20935/acadenvsci7508 article EN cc-by 2025-02-06

To achieve high performance with FPGA-equipped heterogeneous compute systems, it is crucial to co-optimize data placement and scheduling maximize reuse bandwidth utilization for both on- off-chip memory accesses. However, optimizing the FPGA accelerators a complex task. One must acquire in-depth knowledge of target device its associated system in order apply set advanced optimizations. Even latest high-level synthesis (HLS) tools, programmers often have insert many low-level vendor-specific...

10.1145/3490422.3502369 article EN 2022-02-11

With the advent of real life applications in fields public safety like disaster management and defence, Quad copter is becoming more popular. does not require any traffic signal; it can fly sky bird go anywhere as per requirement. This feature has boosted up popularity community. Now a day's get dependent on copter, therefore system needs to be robust less expensive. For example, defence field security major issue, while Disaster time issue. The paper proposes low cost, secure (as Global...

10.1109/ccwc.2018.8301782 article EN 2022 IEEE 12th Annual Computing and Communication Workshop and Conference (CCWC) 2018-01-01

State Restoration Ratio (SRR) has been the de facto standard for evaluating quality of signals selected post-silicon tracing and debug. Given a set S signals, SRR measures fraction (gate-level) design states that can be inferred from observing in at each cycle. Unfortunately, spite its widespread use, we found is intrinsically unsuitable as metric trace signal quality, it captures neither higher-level functionality nor constraints requirements on imposed by architectural, physical, or...

10.5555/2840819.2840820 article EN 2015-11-02

The concept of Cloud based automated multipurpose system with self-communicating bots controlled by swarm drones is a comprehensive and layered framework that caters to the needs multiple facets an application project. Swarm robotics associate approach coordination multi-robot systems incorporates massive numbers individual physical robots. A collective behaviour emerges from interactions between robots atmosphere. This emerged on sphere artificial intelligence influenced biological studies...

10.1109/ccwc.2018.8301781 article EN 2022 IEEE 12th Annual Computing and Communication Workshop and Conference (CCWC) 2018-01-01

State Restoration Ratio (SRR) has been the de facto standard for evaluating quality of signals selected post-silicon tracing and debug. Given a set S signals, SRR measures fraction (gate-level) design states that can be inferred from observing in at each cycle. Unfortunately, spite its widespread use, we found is intrinsically unsuitable as metric trace signal quality, it captures neither higher-level functionality nor constraints requirements on imposed by architectural, physical, or...

10.1109/iccad.2015.7372542 article EN 2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) 2015-11-01

Abstract Mining and related activities cause severe degradation of ambient air quality. A study particulate matter (PM) across transportation, mining control (C) sites for dust attenuation capacity (DAC) in selected tree species were carried out Jharia coalfield (JCF) to estimate the menace pollution also measure tolerance index (APTI). Results indicated that maximum value PM 10 2.5 ranged from 54 174 29 78 μg m − 3 respectively all sites. The values occurred transportation minimum at C both...

10.1186/s42834-019-0039-y article EN cc-by Sustainable Environment Research 2019-12-01

The dislocation-related deep levels in InxGa1−xAs layers grown by molecular beam epitaxy on GaAs substrates have been investigated. Virtually unstrained InGaAs with mole fraction x of 0.10, 0.20, and 0.30 obtained properly designing the In composition linearly graded buffers. Two electron traps, labeled as E2 E3, whose activation energy scales well gap, found. Unlike E2, E3 shows: (i) a logarithmic dependence level transient spectroscopy amplitude filling pulse width (ii) an increase...

10.1063/1.368404 article EN Journal of Applied Physics 1998-09-01

Power side-channel (PSC) attacks exploit the dynamic power consumption of cryptographic operations to leak sensitive information about encryption hardware. Therefore, it is necessary conduct a PSC analysis assess susceptibility systems and mitigate potential risks. Existing primarily focuses on postsilicon implementations, which are inflexible in addressing design flaws, leading costly time-consuming postfabrication re-spins. Hence, presilicon required for early detection vulnerabilities...

10.1109/tvlsi.2024.3390601 article EN IEEE Transactions on Very Large Scale Integration (VLSI) Systems 2024-04-26

10.1109/tcsii.2024.3437235 article EN cc-by IEEE Transactions on Circuits & Systems II Express Briefs 2024-08-02

We present a systematic and efficient ranking method to quantify the goodness of an assertion. model dependencies among design variables as directed graph called variable dependency graph. define assertion importance complexity metrics use algorithmically compute those two metrics. repurpose coverage algorithm from literature form statement-coverage-based our baseline. compare both qualitatively quantitatively this demonstrate that is computationally more than takes up 4366× less computation...

10.1109/tcad.2019.2921374 article EN IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 2019-06-06

Power Management Units (PMUs) are large integrated circuits consisting of many predesigned mixed-signal components. PMU integration poses a serious verification problem considering the size circuit and complexity analog simulation. In this article we present an approach for automatic generation behavioral models components from top-down skeleton models, fitted with parameter values estimated by bottom-up extraction algorithms. It is shown that replacing these autogenerated hybrid...

10.1145/1970353.1970367 article EN ACM Transactions on Design Automation of Electronic Systems 2011-06-01

Debugging the pre-Silicon Register Transfer Level (RTL) design is one of most resource and time intensive processes in contemporary hardware cycles. Given scale complexity designs, bug localization very valuable for debugging. We present an automatic technique RTL. Our based on identifying statistically relevant common symptoms across failing simulation traces through mining, mapping these back to corresponding execution paths RTL source code. localized code zones are small, focused,...

10.1109/vlsid.2016.14 article EN 2016-01-01

The past decade has witnessed increasing adoption of high-level synthesis (HLS) to implement specialized hardware accelerators targeting either FPGAs or ASICs. However, current HLS programming models entangle algorithm specifications with customization techniques, which lowers both the productivity and portability accelerator design. To tackle this problem, recent efforts such as HeteroCL propose decouple definition from essential techniques in compute, data type, memory, productivity,...

10.1145/3489517.3530681 article EN Proceedings of the 59th ACM/IEEE Design Automation Conference 2022-07-10

We have used Gaussian shape of individual phonon replicas for fitting the experimental curve as suggested by Collan and Krustok. Better fit has been obtained using parameters E0 (zero energy)=1.28 eV, Eph (phonon energy)=0.038 δ broadening parameter)=0.026 eV S (Hwang–Rhys factor)=2.13. Thus, results Pal Bose remain unchanged. Fitting Krustok no physical significance.

10.1063/1.363028 article EN Journal of Applied Physics 1996-08-01

We present a method for selecting trace messages post-silicon validation of Systems-on-a-Chips (SoCs) with diverse usage scenarios. model specifications interacting flows in typical applications. Our optimizes buffer utilization and flow specification coverage. debugging root cause analysis subtle bugs the industry scale OpenSPARC T2 processor. demonstrate that this is beyond capacity current tracing approaches. achieve 98.96% coverage 94.3% (average). localize to 21.11% (average) potential...

10.1145/3195970.3195992 article EN 2018-06-19

We present Preambl, an approach that applies automatically generated invariants to regression testing and bug localization. Our invariant generation methodology is Precis, automatic scalable engine uses program predicates guide clustering of dynamically obtained path information. In this paper, we apply it for capturing information statistical analysis based a technique localize bugs in paths variable lengths. are able map the localized post-deployment on pre-release along path. experimental...

10.1109/ase.2013.6693125 article EN 2021 36th IEEE/ACM International Conference on Automated Software Engineering (ASE) 2013-11-01

Photoluminescence (PL) measurements carried out between 10 and 140 K on Cu-diffused InP showed the presence of Cu band at 1.216 eV. From temperature variation PL intensity activation energy for quenching was found to be 77.4 meV. The line shape, linewidth, configuration coordinate diagram defect have been calculated. vibration excited state 14 meV from linewidth analysis. A coupled phonon 38 a Huang–Rhys factor 2.13 were obtained line-shape displacement minimum ground 0.079 Å which that...

10.1063/1.359695 article EN Journal of Applied Physics 1995-10-15

Due to the continuous technology scaling and lowering of operating voltages, modern computer systems are highly vulnerable soft errors induced by high-energy particles. Soft can corrupt program outputs leading silent data corruption or a Crash. To protect against such failures, architects need precisely quickly identify instructions that be protected. Traditional techniques for reliability estimation either use expensive time-consuming fault injection inaccurate analytical models protected...

10.23919/date51398.2021.9474098 article EN Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015 2021-02-01
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