Katie Lim

ORCID: 0009-0003-1303-0954
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About
Contact & Profiles
Research Areas
  • Parallel Computing and Optimization Techniques
  • Interconnection Networks and Systems
  • Cloud Computing and Resource Management
  • Embedded Systems Design Techniques
  • Distributed and Parallel Computing Systems
  • Advanced Data Storage Technologies
  • Advanced Database Systems and Queries
  • Green IT and Sustainability
  • VLSI and Analog Circuit Testing
  • Scientific Computing and Data Management
  • Semantic Web and Ontologies
  • CCD and CMOS Imaging Sensors
  • IoT and Edge/Fog Computing
  • Particle Detector Development and Performance
  • Caching and Content Delivery
  • Radiation Detection and Scintillator Technologies
  • Low-power high-performance VLSI design

University of Washington
2018-2024

Seattle University
2023-2024

Princeton University
2018

The end of Dennard's scaling and the looming power wall have made energy primary design goals for modern processors. Further, new applications such as cloud computing Internet Things (IoT) continue to necessitate increased performance efficiency. Manycore processors show potential in addressing some these issues. However, there is little detailed data on manycore In this work, we carefully study characteristics Piton, a 25-core open source academic processor, including voltage versus...

10.1109/hpca.2018.00070 article EN 2018-02-01

Heterogeneous architectures and heterogeneous-ISA designs are growing areas of computer architecture system software research. Unfortunately, this line research is significantly hindered by the lack experimental systems modifiable hardware frameworks. This work proposes BYOC, a "Bring Your Own Core" framework that specifically designed to enable heterogeneous BYOC an open-source provides scalable cache coherence system, includes out-of-the-box support for four different ISAs (RISC-V 32-bit,...

10.1145/3373376.3378479 article EN 2020-03-09

Energy efficiency has become an increasingly important concern in computer architecture due to the end of Dennard scaling. Heterogeneity been explored as a way achieve better energy and heterogeneous microarchitecture chips have common mobile setting. Recent research using heterogeneous-ISA, microarchitecture, general-purpose cores further gains. However, there is no open-source hardware implementation heterogeneous-ISA processor available for research, effective on processors necessitates...

10.1145/3289602.3293958 article EN 2019-02-20

FPGA prototyping has long been an indispensable technique in pre-silicon verification as well enabling early-stage software development. FPGAs themselves have also gained popularity hardware accelerators deployed datacenters. However, development brings a plethora of problems. These issues constitute high barrier towards mass adoption agile surrounding FPGA-based projects.

10.1145/3620666.3651356 article EN 2024-04-24

I/O devices in public clouds have integrated increasing numbers of hardware accelerators, e.g., AWS Nitro, Azure FPGA and Nvidia BlueField. However, such specialized compute (1) is not explicitly accessible to cloud users with performance guarantee, (2) cannot be leveraged simultaneously by both providers users, unlike general-purpose (e.g., CPUs). Through ten observations, we present that the fundamental difficulty democratizing accelerators insufficient isolation support. The key obstacles...

10.48550/arxiv.2407.10098 preprint EN arXiv (Cornell University) 2024-07-14

CPU affinity reduces data copies and improves locality has become a prevalent technique for high-performance programs in datacenters. This paper explores the tension between sustainability. In particular, settings can lead to significant uneven aging of cores on CPU. We observe that infrastructure threads, used wide spectrum network, storage, virtualization sub-systems, exercise their affinitized up 23× more when compared typical μ s-scale application threads. addition, we threads generate...

10.1145/3698365.3698371 article EN ACM SIGEnergy Energy Informatics Review 2024-07-01

CPU affinity reduces data copies and improves locality has become a prevalent technique for high-performance programs in datacenters. This paper explores the tension between sustainability. In particular, settings can lead to significant uneven aging of cores on CPU. We observe that infrastructure threads, used wide spectrum network, storage, virtualization sub-systems, exercise their affinitized up 23× more when compared typical μs-scale application threads. addition, we threads generate...

10.1145/3604930.3605706 article EN 2023-07-09

Energy efficiency has become an increasingly important concern in computer architecture due to the end of Dennard scaling. Heterogeneity been explored as a way achieve better energy and heterogeneous microarchitecture chips have common mobile setting. Recent research using heterogeneous-ISA, microarchitecture, general-purpose cores further gains. However, there is no open-source hardware implementation heterogeneous-ISA processor available for research, effective on processors necessitates...

10.48550/arxiv.1811.08091 preprint EN other-oa arXiv (Cornell University) 2018-01-01
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