Pragnya Sudershan Nalla

ORCID: 0009-0006-3688-6941
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About
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Research Areas
  • Advanced Memory and Neural Computing
  • Neural Networks and Reservoir Computing
  • CCD and CMOS Imaging Sensors
  • Advanced Data Storage Technologies
  • Parallel Computing and Optimization Techniques
  • Computer Graphics and Visualization Techniques
  • Industrial Vision Systems and Defect Detection
  • Ferroelectric and Negative Capacitance Devices
  • Sensor Technology and Measurement Systems
  • Manufacturing Process and Optimization
  • Electrodeposition and Electroless Coatings
  • Semiconductor materials and devices
  • Copper Interconnects and Reliability
  • Transition Metal Oxide Nanomaterials

University of Minnesota
2024-2025

Twin Cities Orthopedics
2024

Arizona State University
2023

Lam Research (United States)
2015

This work introduces two new metallization schemes using the electroless deposition (ELD) technique; one based on contact fill and via prefill. One of key features process is its selective deposition, which can be used for bottom-up high aspect ratio features. The feasibility this Co ELD demonstrated contacts landing W vias Cu. Our simulation resistance shows that it serve as alternative to Cu with lower below 15nm dimension. results from a planar capacitor study show there no degraded...

10.1109/iitc-mam.2015.7325605 article EN 2015-05-01

A dynamic vision sensor (DVS) outputs a sequence of digital events, each representing change in brightness at particular time. As DVS keeps scaling down the pixel size and increasing resolution, larger volume data is generated limited bandwidth, resulting reduced system-level throughput, as shown Fig. 1(a). Hence, conventional interconnect solutions cannot meet requirement real-time output from high-speed DVS.

10.1109/a-sscc58667.2023.10347978 article EN 2022 IEEE Asian Solid-State Circuits Conference (A-SSCC) 2023-11-05

In-memory computing (IMC) has been proposed as a solution to accelerate deep neural networks (DNNs) and other machine learning algorithms. RRAM-based IMC accelerators combine memory access computation into the same array structure, saving significant amount of chip area. However, output from RRAM crossbar requires an analog-to-digital converter (ADC) for further processing which causes accuracy drop, extra power dissipation, area overhead. In addition, device also suffers several...

10.1109/vlsi-tsa/vlsi-dat57221.2023.10134272 article EN 2023-04-17
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