In-memory-computing (IMC) SRAM architecture has gained significant attention as it achieves high energy efficiency for computing a convolutional neural network (CNN) model [1]. Recent works investigated the use of analog-mixed-signal (AMS) hardware area and [2], [3]. However, AMS output is well known to be susceptible process, voltage, temperature (PVT) variations, limiting precision ultimately inference accuracy CNN. We reconfirmed, through simulation capacitor-based IMC macro that computes...

Capacitor-based in-memory computing (IMC) SRAM has recently gained significant attention as it achieves high energy-efficiency for deep convolutional neural networks (DCNN) and robustness against PVT variations [1], [3], [7], [8]. To further improve robustness, we identify two places of bottleneck in prior capacitive IMC works, namely (i) input drivers (or digital-to-analog converters, DACs) which charge discharge various capacitors, (ii) analog-to-digital converters (ADCs) convert analog...

In mobile and edge devices, always-on keyword spotting (KWS) is an essential function to detect wake-up words. Recent works achieved extremely low power dissipation down ~500nW. However, most of them adopt noise-dependent training, i.e. training for a specific signal-to-noise ratio (SNR) noise type, therefore their accuracies degrade different SNR levels types that are not targeted in the (Fig. 9.9.1, top left). To improve robustness, so-called noise-independent can be considered, which use...

In the era of LLMs, dense operations such as GEMM and MHA are critical components. These well-suited for parallel execution using a tilebased approach. While traditional GPU programming often relies on low level interfaces like CUDA or SYCL, Triton has emerged DSL that offers more user-friendly portable alternative by at higher level. The current starts workgroup (aka threadblock) level, directly lowers to per-thread And then attempt coalesce amend through series passes, promoting...

Tiny machine learning (TinyML) envisions executing a deep neural network (DNN)-based inference on an edge device for improving battery life, latency, security, and privacy. Toward this vision, recent microcontroller units (MCUs) integrate in-memory computing (IMC) hardware to leverage its high energy efficiency throughput in vector–matrix multiplication (VMM). However, those existing works require large IMC hardware, severely increasing the area overhead. In addition, most use...

Always-on artificial intelligent (AI) functions such as keyword spotting (KWS) and visual wake-up tend to dominate total power consumption in ultra-low devices [1]. A key observation is that the signals an always-on function are sparse time, which a spiking neural network (SNN) classifier can leverage for savings, because switching activity of SNNs scale with spike rate. Toward this goal, we present novel SNN architecture functions, demonstrating sub-300nW at competitive inference accuracy...

Recent SRAM-based in-memory computing (IMC) hardware demonstrates high energy efficiency and throughput for matrix–vector multiplication (MVM), the dominant kernel deep neural networks (DNNs). Earlier IMC macros have employed analog-mixed-signal (AMS) arithmetic hardware. However, those so-called AIMCs suffer from process, voltage, temperature (PVT) variations. Digital (DIMC) macros, on other hand, exhibit better robustness against PVT variations, but they tend to require more silicon area....

This article presents multistep accumulation capacitor coupling static random-access memory (MACC-SRAM), capacitor-based in-memory computing (IMC) SRAM macro for 4-b deep convolutional neural network (DNN) inference. The can simultaneously activate all its 128 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times$</tex-math> </inline-formula> custom 9T1C bitcells to perform the vector–matrix...

As the power system continues to be flooded with intermittent resources, it becomes more important accurately assess role of hydro and its impact on grid. While hydropower generation has been studied for decades, dependency water availability constraints in operation are not well represented models used planning large-scale interconnection studies. There still multiple modeling gaps that need addressed; if not, they can lead inaccurate reliability studies, consequently unintentional load...

We propose $L^{p}$ distance-based goodness-of-fit (GOF) tests for uniform stochastic ordering with two continuous distributions $F$ and $G$, both of which are unknown. Our motivated by the fact that when $G$ uniformly stochastically ordered, ordinal dominance curve $R=FG^{-1}$ is star-shaped. derive asymptotic prove our testing procedure has a unique least favorable configuration $p\in [1,\infty]$. use simulation to assess finite-sample performance demonstrate modified, one-sample version...

This paper presents a novel spiking neural network (SNN) classifier architecture for enabling always-on artificial intelligent (AI) functions, such as keyword spotting (KWS) and visual wake-up, in ultra-low-power internet-of-things (IoT) devices. Such hardware tends to dominate the power efficiency of an IoT device therefore it is paramount minimize its dissipation. A key observation that input signal typically sparse time. great opportunity SNN can leverage because switching activity...

Uniform stochastic ordering (USO), also known as hazard rate or failure ordering, has garnered significant interest across various applications.In this study, we present nonparametric approaches for comparing distributions within the framework of USO using ordinal dominance curve.Our study consists three main components.The first one offers new tests equality among multiple under assumptions.Secondly, provide goodness-of-fit to investigate whether adhere USO.Lastly, identify that exhibit...

As the power system continues to be flooded with intermittent resources, it becomes more important accurately assess role of hydro and its impact on grid. While hydropower generation has been studied for decades, dependency water availability constraints in operation are not well represented models used planning large-scale interconnection studies. There still multiple modeling gaps that need addressed; if not, they can lead inaccurate reliability studies, consequently unintentional load...

Abstract Printmaking has a long history and high artistic value, it is challenging research to integrate computer vision technology into artists’ printmaking process. In this paper, the line, texture, frequency features of modern prints are extracted according their characteristics then restructured by convolutional neural network. The parameters conversion network updated using gradient descent, CLIP used as pre-training model establish printmaking-style migration algorithm. Computer...

TinyML envisions performing a deep neural network (DNN)-based inference on an edge device, which makes it paramount to create microcontroller unit (MCU). Toward this vision, some of the recent MCUs integrated in-memory computing (IMC) based accelerators [1–3]. However, they employ analog-mixed-signal (AMS) versions, exhibiting limited robustness over process, voltage, and temperature (PVT) variations [1–2]. They also large amount IMC hardware, increases silicon area cost. Also, do not...