Jia Hou

ORCID: 0009-0007-1744-3667
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About
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Research Areas
  • Interconnection Networks and Systems
  • Advanced Memory and Neural Computing
  • Coding theory and cryptography
  • Parallel Computing and Optimization Techniques
  • Cryptography and Data Security
  • Advanced Neural Network Applications
  • Cryptography and Residue Arithmetic
  • Adversarial Robustness in Machine Learning
  • Cryptographic Implementations and Security
  • Physical Unclonable Functions (PUFs) and Hardware Security
  • Integrated Circuits and Semiconductor Failure Analysis
  • Chaos-based Image/Signal Encryption
  • Embedded Systems Design Techniques
  • Low-power high-performance VLSI design
  • Essential Oils and Antimicrobial Activity
  • CCD and CMOS Imaging Sensors
  • Advanced Computational Techniques and Applications
  • Ferroelectric and Negative Capacitance Devices
  • Neuroscience and Neural Engineering
  • Spectroscopy and Chemometric Analyses
  • Analog and Mixed-Signal Circuit Design
  • Polynomial and algebraic computation
  • VLSI and FPGA Design Techniques
  • Water Quality Monitoring and Analysis
  • Smart Grid and Power Systems

Xi'an Jiaotong University
2019-2025

Shenyang University
2014

North China Electric Power University
2012

China Electric Power Research Institute
2012

Convolutional neural networks (CNNs) have demonstrated significant superiority in modern artificial intelligence (AI) applications. To accelerate the inference process of CNNs, reconfigurable CNN accelerators that support diverse are widely employed for AI systems. Given ubiquitous deployment these systems, there is a growing concern regarding security and potential attacks they may face, including hardware Trojans. This paper proposes Trojan designed to attack crucial component FPGA-based...

10.3390/mi15010149 article EN cc-by Micromachines 2024-01-19

10.1145/3658617.3697775 article EN Proceedings of the 28th Asia and South Pacific Design Automation Conference 2025-01-20

Convolutional neural networks (CNNs) have demonstrated significant superiority in modern artificial intelligence (AI) applications. To accelerate the inference process of CNNs, reconfigurable CNN accelerators that support diverse are widely employed for AI systems. Due to ubiquitous deployment these systems, a strong incentive rises adversaries attack via hardware Trojan, which is one most important models security domain. This paper proposed Trojan attacks crucial component accelerators,...

10.1109/icsict49897.2020.9278162 article EN 2022 IEEE 16th International Conference on Solid-State & Integrated Circuit Technology (ICSICT) 2020-11-03

Polynomial multiplication is a significant bottleneck for Saber. To speed it up, number theoretic transform (NTT), Toom-Cook and Schoolbook polynomial (SPM) are commonly used algorithms. Among them, SPM has no restrictions more suitable high parallel architecture. However, superior performance compatibility across different devices not simultaneously available in the current work. Therefore, we propose highly scalable Winograd-based algorithm that reduces of loops achieves 32.18% reduction...

10.1109/tcsii.2023.3339566 article EN IEEE Transactions on Circuits & Systems II Express Briefs 2023-12-05

The inference results of neural network accelerators often involve personal privacy or business secrets in intelligent systems. It is important for the safety convolutional (CNN) accelerator to prevent key data and result from being leaked. latest CNN models have started combine with fully homomorphic encryption (FHE), ensuring security. However, computational complexity, storage overhead, time are significantly increased compared traditional models. This paper proposed a lightweight FHE...

10.1109/icecs53924.2021.9665520 article EN 2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS) 2021-11-28

The customization of accelerators for sparse convolutional neural networks (SCNN) has been demonstrated to be a promising approach enhance the computational efficiency CNNs. However, current sparse-based works always employ reduced-scale engines (CEs), resulting in limited performance compared previous dense-based accelerators. It is found that deployment large-scale CEs encounters three challenges: inadequate utilization CEs, unstable workload and complex interconnections between...

10.1109/tcsii.2024.3359263 article EN IEEE Transactions on Circuits & Systems II Express Briefs 2024-01-29

With the boom in artificial intelligence (AI), numerous reconfigurable convolution neural network (CNN) accelerators have emerged within both industry and academia, aiming to enhance AI computing capabilities. However, this rapid landscape has also witnessed a rise hardware Trojan attacks targeted at CNN accelerators, thereby posing substantial threats reliability security of these systems. Despite escalating concern, there exists scarcity protection schemes explicitly tailored counteract...

10.3390/cryptography8030034 article EN cc-by Cryptography 2024-08-04

This paper proposed a context-directed replacement policy (CRP) to improve cache hit rate for Coarse-grained reconfigurable arrays (CGRA). CRP updates the priority according usage of configuration contexts. Once finding two candidates contexts with highest priority, reserves larger context in and evict smaller one. Using five different access patterns as benchmark, experimental results show that outperforms LRU RRIP policies, especially scan mixed patterns. Under test random sequence, can...

10.1109/icecs49266.2020.9294864 article EN 2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS) 2020-11-23

The increasingly complicated and versatile convolutional neural networks (CNNs) models bring challenges to hardware acceleration in terms of performance, energy efficiency flexibility. This paper proposes a reconfigurable accelerator (RNA) for flexible efficient CNN acceleration. To provide flexibility, RNA employs dynamically computing framework rapidly configure data path between processing elements (PE) at run-time, as well an interlaced access mechanism multi-bank RAM. achieve high...

10.1142/s0218126622502899 article EN Journal of Circuits Systems and Computers 2022-06-01

In this paper, the air conditioning system in pharmaceutical industry throughout life cycle energy efficiency had been evaluated according to SETAC and ISO put forward idea of "life assessment. The purpose was adopt reasonable measures saving technology minimum consumption clean minimal impact on environment load. At same time, economy reasonable. Clean wind a factory as an example. renovation effect were analyzed. CO 2 emissions analyzed its stage which provided reference for other engineering.

10.4028/www.scientific.net/amm.644-650.6343 article EN Applied Mechanics and Materials 2014-09-01

Coarse-grained reconfigurable arrays (CGRA) with high performance cache prefetching can mitigate off-chip memory latency. Taking advantage of the iteration number configuration context running on CGRA, this paper proposes a based (CCP) mechanism for CGRA. CCP utilizes first 256 accesses to obtain best offset demand addresses base address, and then associates it generate miss. Moreover, reduce bandwidth consumption caused by inaccurate prefetching, dynamically adjusts prefetch degree...

10.1109/icecs46596.2019.8964688 article EN 2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS) 2019-11-01

Artificial intelligence is changing and influencing our world. As one of the main algorithms in field artificial intelligence, convolutional neural networks (CNNs) have developed rapidly recent years. Especially after emergence NASNet, CNNs gradually pushed idea AutoML to public’s attention, large numbers new structures designed by automatic searches are appearing. These usually based on reinforcement learning evolutionary algorithms. However, sometimes, blocks these complex, there no small...

10.3390/info14110604 article EN cc-by Information 2023-11-07

The Number Theoretic Transform (NTT) is currently widely used to accelerate polynomial multiplication in finite fields, which the computational bottleneck of lattice-based fully homomorphic encryption schemes. key challenge NTT hardware structure implementation lies large amount data storage and complex pattern access. This paper proposes an efficient access algorithm. Benefiting from specific optimization different stages NTT, use resource can be reduced by 46%~80%, performance based on...

10.1109/icicm59499.2023.10365797 article EN 2022 7th International Conference on Integrated Circuits and Microsystems (ICICM) 2023-10-20

Because of many present problems the intelligent switch in substation, it is necessary to study on components device. The hardware platform device was based high-speed low-voltage differential bus (BLVDS). By improving real-time characteristics, communication available for substation process bus. It also described that solution online condition monitoring Research these aspects laid a solid foundation

10.4028/www.scientific.net/amm.241-244.1936 article EN Applied Mechanics and Materials 2012-12-01
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