FPGA-based CNN accelerators have advantages in flexibility and power efficiency so are being deployed by a number of cloud computing service providers, including Microsoft, Amazon, Tencent, Alibaba. Given the increasing complexity neural networks, however, it is becoming challenging to efficiently map CNNs multi-FPGA platforms. In this work, we present scalable framework, FPDeep, which helps engineers specific CNN's training logic cluster or build RTL implementations for target network. With...

In order to deploy a secure WLAN mesh network, authentication of both users and APs is needed, mechanism should be employed. However, some additional configurations trusted third party agencies are still needed on-site system. This paper proposes new block chain-based protocol for security access, reduce the deployment costs resolve issues requiring key delivery central server during IEEE 802.11X authentication. method takes user's request as transaction, considers all records in network...

The ring learning with error (RLWE)-based fully homomorphic encryption (FHE) scheme has become one of the most promising FHE schemes. However, its performance is limited by multiplication, especially polynomial multiplication which occupies major computing resources. Therefore, efficient implementation crucial for high-performance applications. In this article, we present an area-efficient and highly unified reconfigurable multicore number theoretic transform (NTT)/inverse NTT (INTT)...

To improve flexibility and energy efficiency of Convolutional Neural Networks, a number cloud computing service providers-including Microsoft, Amazon, Alibaba-are using FPGA-based CNN accelerators. However, the growing size complexity neural networks, coupled with communication off-chip memory bottlenecks, make it increasingly difficult for multi-FPGA designs to achieve high resource utilization performance, especially when training. In this work, we present new results scalable framework,...

The implementation of Molecular Dynamics (MD) on FPGAs has received substantial attention. Previous work, however, consisted either proof-of-concept implementations components, usually the range-limited force; full systems, but with much work shared by host CPU; or prototype demonstrations, e.g., using OpenCL, that neither implement a whole system nor have competitive performance. In this paper, we present what believe to be first full-scale FPGA-based simulation engine, and show its...

Convolutional neural networks (CNNs) have demonstrated significant superiority in modern artificial intelligence (AI) applications. To accelerate the inference process of CNNs, reconfigurable CNN accelerators that support diverse are widely employed for AI systems. Given ubiquitous deployment these systems, there is a growing concern regarding security and potential attacks they may face, including hardware Trojans. This paper proposes Trojan designed to attack crucial component FPGA-based...

The architecture of the Microsoft Catapult II cloud places accelerator (FPGA) as a bump-in-the-wire on way to network and thus promises dramatic reduction in latency layers hardware software are avoided. We demonstrate this capability with an implementation 3D FFT. Next we examine phased application elasticity, i.e., use reduced set nodes for some phases HPC application. find that, FFT phase within Molecular Dynamics, such contraction is beneficial 13%–14% performance improvement. Turning...

As convolutional neural networks (CNNs) become more and diverse complicated, acceleration of CNNs increasingly encounters a bottleneck balancing performance, energy efficiency, flexibility in unified architecture. This paper proposed Winograd-based highly efficient dynamically Reconfigurable Accelerator (named WRA) for quickly evolving CNN models. A cost-effective convolution decomposition method (CDW) was proposed, it extends the application fast Winograd algorithm. Based on CDW,...

High inference latency seriously limits the deployment of DNNs in real-time domains such as autonomous driving, robotic control, and many others. To address this emerging challenge, researchers have proposed approximate with reduced precision, e.g., Binarized Neural Networks (BNNs). While BNNs can be built to little loss accuracy, reduction still has much room for improvement. In paper, we propose a single-FPGA-based BNN accelerator that achieves microsecond-level ultra-low-latency ImageNet,...

To reduce multiplication operations in convolution of convolutional neural networks (CNNs), there are three widely used acceleration algorithms, i.e., Winograd, FFT and FFA. However, current accelerators based on these algorithms have issues flexibility efficiency. Firstly, some utilized a combination employed multiple types computational units to achieve their respective advantages. As result, left unused when the best-performing unit is working, which causes much area inefficiency....

Fully homomorphic encryption (FHE) allows arbitrary computation on encrypted data and has great potential in privacy-preserving cloud computing securely outsource computational tasks. However, the excessive complexity is key limitation that restricting practical application of FHE. In this paper we proposed a FPGA-based high parallelism architecture to accelerate FHE schemes based ring learning with errors (RLWE) problem, specifically, presented fast implementation leveled fully scheme BGV....

Fully homomorphic encryption (FHE) allows arbitrary computation on encrypted data and thus has potential in privacy-preserving computing. However, efficiency is still the bottleneck. In this paper we present an area-efficient highly unified reconfigurable multi-core architecture (named ReMCA) for full Residue Number System (RNS) variant of Fan-Vercauteren Brakerski's scheme (RNS-BFV), which employs a variable number processing elements (PEs) RNS channels. The PE unit can be flexibly...

In this brief, a hybrid-grained reconfigurable architecture (HReA) is introduced to process 13-Dwarfs. The proposed dynamically fabric consists of four 4 × multi-functional processing elements array, where structure combine 32-bit data path with 1-bit accommodate multiple computing granularities in Aiming at the flexibility 13-Dwarfs calculation, directional broadcasting scheme for multi-bank memory, cache partitioning mechanism, and prefetching methods are further improve HReA performance...

Deep learning architecture has achieved amazing success in many areas with the recent advancements convolutional neural networks (CNNs). However, real-time applications of CNNs are seriously hindered by significant storage and computational costs. Structured pruning is a promising method to compress accelerate does not need special hardware or software for an auxiliary calculation. Here simple strategy structured approach proposed crop unimportant filters neurons automatically during...

Simultaneous localization and mapping (SLAM) is considered as a key technique in augmented reality (AR), robotics unmanned driving. In the field of SLAM, solutions based on monocular sensors have gradually become important due to their ability recognize more environmental information with simple structures low costs. Feature-based ORB-SLAM popular many applications, but it has limitations complex indoor scenes. Firstly, camera pose estimation images greatly affected by environment; secondly,...

FPGA-centric clouds and clusters provide direct programmable interconnects with obvious benefits for communication latency bandwidth. One rarely studied aspect of DPI is that they facilitate application-aware routing: if patterns are static known a priori, as usually the case, then judicious routing can reduce congestion, latency, hardware required. In this study we explore applying method offline/static to collective operations, in particular, multicast reduction. An entirely new...

Neural network pruning, which can be divided into unstructured pruning and structured strategies, has been proven to an efficient method substantially reduce the number of computations convolutional neural networks (CNNs). However, it remains difficult combine advantages these two strategies. This article proposes a high-performance accelerator for sparse CNNs. First, convolution-based filter selection clustering (FSCM) is proposed reorder filters uniform-size dense filters, eliminating...