Heterojunction tunneling field-effect transistors (HTFETs) that use strained-silicon/strained-germanium type-II staggered band alignment for band-to-band (BBT) injection are simulated using a nonlocal quantum model. The model is first compared to measurements of gate- controlled BBT in previously fabricated strained SiGe diodes and shown produce good agreement with the measurements. simulation gated diode structure then extended study HTFETs an effective energy barrier 0.25 eV at...

A simple semiempirical model I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">D</sub> (V xmlns:xlink="http://www.w3.org/1999/xlink">GS</sub> , V xmlns:xlink="http://www.w3.org/1999/xlink">DS</sub> ) for short-channel MOSFETs applicable in all regions of device operation is presented. The based on the so-called ldquotop-of-the-barrier-transportrdquo model, and we refer to it as ldquovirtual sourcerdquo (VS) model. simplicity comes from fact that...

A simple model that links MOSFET performance, in the form of intrinsic switch delay, to effective carrier velocity channel is developed and fitted historical data. It shown nearly continuous increase, most recently via introduction process-induced strain, has been responsible for device performance increase commensurately with dimensional scaling. The paper further examines material innovations will be required order maintain continued commensurate scaling beyond what can achieved discusses...

Strained pseudomorphic Si/Si <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1-x</sub> Ge xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> /Si gate-controlled band-to-band tunneling (BTBT) devices have been analyzed with varying composition up to 57% and p+ tunnel-junction (source) doping concentration in the 10 <sup xmlns:xlink="http://www.w3.org/1999/xlink">19</sup> -10 xmlns:xlink="http://www.w3.org/1999/xlink">20</sup> cm...

We report for the first time on graphene transistors that incorporate a remote plasma-assisted atomic-layer-deposited Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> gate dielectric is directly deposited to chemical-vapor-deposited monolayer at 100°C. Following formation, atomic force microscopy and Raman measurements show apparently uniform conformal coverage retention of nearly...

We constructed ultraviolet (UV) photodetectors by room-temperature deposition of Si nanoparticle films on p-type substrates. Silicon nanoparticles 1-nm diameter are dispersed from wafers using electrochemical etching. The current-voltage characteristics indicate a photoconductor in series with diode-like junction large enhancement the forward current under UV illumination. With increasing wavelength, response drops rapidly, dropping to few percent at 560 nm. These results point sensitive...

We constructed ultraviolet (UV) photodetectors using thin films of silicon nanoparticles as active media. The Si nanoparticle are electrodeposited at room temperature on p-type substrates. Uniform 1-nm diameter dispersed from wafers electrochemical etching. ultrabright under UV excitation, with nanosecond luminescence time characteristics. Current-voltage (I--V) characteristics indicate a photoconductor in series diode-like junction large enhancement the forward current illumination. Our...

Metal-oxide-semiconductor capacitors containing various densities of ex situ produced, colloidal, highly monodisperse, spherical, 1nm silicon nanoparticles were fabricated and evaluated for potential use as charge storage elements in future nonvolatile memory devices. The capacitance-voltage characteristics are well behaved agree with similarly zero-nanoparticle control samples an ideal simulation. Unlike larger particle systems, the demonstrated effect exhibits effectively pure hole...

<para xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> Strained silicon-germanium <formula formulatype="inline"><tex>$(\hbox{Si}_{0.6}\hbox{Ge}_{0.4})$</tex> </formula> gated diodes have been fabricated and analyzed. The devices exhibit significantly enhanced gate-controlled tunneling current over that of coprocessed silicon control devices. characteristics are insensitive to measurement temperature in the 80 K 300 range. Independently extracted...

Transistors are constructed using chemical vapor-deposited graphene on mechanically flexible polyimide and incorporate a low-temperature atomic-layer-deposited gate dielectric. Three-micrometer length transistors with V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ds</sub> = 2.0 have drive current of >; 0.3 A/mm transconductance 3 mS/mm. The peak hole electron mobilities 295 106 cm <sup xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /V ·...

Large-area graphene is synthesized by Cu-catalyzed chemical vapor deposition (CVD), transistors are constructed, and the dc/RF performance examined. Top-gate transistors, i.e., with a gate length of 3 μm V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ds</sub> = 5 V, have peak dc transconductance in excess 20 mS/mm drive current 0.5 A/mm. RF measurements achieve gigahertz extrinsic current-gain cutoff frequency low back biasing. Back-gated...

Large-area chemical vapor deposited graphene/boron-nitride (G/BN) thin films are co-transferred layer-by-layer to silicon-di-Oxide (SiO2) substrates, and transistors constructed examined. Raman spectra high resolution transmission electron microscopy imaging show of quality. The graphene/boron-nitride/SiO2 devices have a significantly increased peak electron/hole mobility 3400/2200 cm2/Vs with reduced effective doping density over reference graphene/SiO2 devices. dependence as function...

Silicon nanoparticles, of predominately 2.9 nm in size, isopropyl alcohol are spin coated directly on device quality silicon-dioxide layers across 150 mm substrates. Atomic force microscopy (AFM) is used to image the nanoparticle distributions and low levels agglomeration with apparently regular internanoparticle distances observed. AFM depth profiling size agreement independent high resolution transmission electron measurements. Hartree–Fock based atomistic simulations confirm possible...

Present red phosphor converters provide spectra dominated by sharp lines and suffer from availability stability issues which are not ideal for color mixing in display or solid state lighting applications. We examine the use of mono dispersed 3 nm silicon nanoparticles, with inhomogeneously broadened luminescence as an effective substitute phosphors. tested a 3-phase hybrid nanophosphor consisting ZnS:Ag, ZnS:Cu,Au,Al, nanoparticles. Correlated temperature is examined under UV LED pumping...

Single tiers of silicon nanowires that bridge the gap between short sidewalls silicon-on-insulator (SOI) source/drain pads are formed. The formation a single tier bridging is enabled by attachment Au catalyst nanoparticles to SOI and subsequent growth epitaxial via vapor-liquid-solid (VLS) process. unobstructed nanowire material occurs due on surfaces removal from SOI-buried oxide (BOX). Three-terminal current-voltage measurements structure using substrate as planar backgate after VLS reveal...

We prepared porous silicon for which the UV reflectance (3.3–6 eV) is nearly eliminated, and exhibits no features at Si interband bulk transitions 3.3, 4.3, 5.5 eV. Plating with a thin layer of copper found to cause recovery bulk-like crystalline resonances. This provides evidence that loss absorption reversible not due permanent in structure. may relate recent model optical activity ultra small nanocrystallites produced by new Si–Si configuration (or phase), distinct from but interconnected...

We employ electroless etching to disperse silicon on insulator (SOI) wafers in ionic silver HF into wirelike nanostructures. The procedure allows detachment of the nanowires at oxide interface and enables easy recovery dispersions for subsequent controlled delivery. Nanowires 10 μm long 50–100 nm thick are demonstrated using an SOI substrate device thickness. Direct material analysis shows no contamination after a wet-etch clean. Anodization treatment wires was conducted. Our measurements...

HgCdTe passivation process must be performed at low temperature in order to reduce Hg depletion. Low plasma enhanced atomic layer deposition (PE-ALD) is an emerging technology for thin highly conformal films meet the demand. Room PE-ALD Al₂O₃ film's on has been studied. Conformal film was investigated through SEM images of deposited onto high aspect ratio features dry etched into HgCdTe. Minority carrier lifetime measured and compared by photoconductive decay transients...

Tunneling transistors that incorporate in the gated source an elevated p <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> Si <sub xmlns:xlink="http://www.w3.org/1999/xlink">0.6</sub> Ge xmlns:xlink="http://www.w3.org/1999/xlink">0.4</sub> /n xmlns:xlink="http://www.w3.org/1999/xlink">-</sup> heterojunction and a HfO xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> /WN gate stack are constructed. XTEM images show tact epitaxial SiGe with...

Wafer-scale graphene synthesized by Chemical Vapor Deposition (CVD) has the potential to enable numerous advanced device and system capabilities. The typical reported carrier mobility of CVD is significantly lower than exfoliated or on-SiC material due potentially different impurity/doping levels quality. Elucidating scattering sources in metal catalyzed essential for realizing high both holes electrons. We constructed field effect transistors using Cu LPCVD p-type doped monolayer used...

Novel niobium heterostructure devices that integrate aluminum, hafnium, and chromium oxide are designed constructed by sputtering atomic layer deposition. The examined for use in resistive switching (RS) memory cells. Specifically, Nb-AlO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> -HfO -AlO -Nb is directly compared with -CrO -Nb. Stable RS observed both cases the conduction mechanisms analyzed detail. There profound differences...

The scalability of ultra-thin double-gate transistors in accordance with ITRS 2003 projection is examined Si and Ge channel materials realistic device structure parasitics. Continuum simulations using Dessis are employed electrostatic transport models adjusted for Ge. density-gradient model used to consider the confinement electrons parameters a Schrodinger-Poisson solver modified different orientations