In this paper, we propose a multithreaded processor architecture which improves machine throughput. our architecture, instructions from different threads (not single thread) are issued simultaneously to multiple functional units, and these can begin execution unless there unit conflicts. This parallel scheme greatly the utilization of unit. Simulation results show that by executing two four in on nine-functional-unit processor, 2.02 3.72 times speed-up, respectively, be achieved over...

In this paper, we propose a multithreaded processor architecture which improves machine throughput. our architecture, instructions from different threads (not single thread) are issued simultaneously to multiple functional units, and these can begin execution unless there unit conflicts. This parallel scheme greatly the utilization of unit. Simulation results show that by executing two four in on nine-functional-unit processor, 2.02 3.72 times speed-up, respectively, be achieved over...

Clinical trials of hypothermic brain treatment for newborn babies are currently hindered by the difficulty in measuring deep temperatures. As one possible methods noninvasive and continuous temperature monitoring that is completely passive inherently safe microwave radiometry (MWR). We have developed a five‐band radiometer system with single dual‐polarized, rectangular waveguide antenna operating within 1–4 GHz range method retrieving profile from five radiometric brightness This paper...

It is practically impossible to measure the Compton profile of any heavy material, because its strong absorption very much reduces intensity. This difficulty has been overcome by use a non-dispersive solid state detector (SSD) together with γ-rays or high energy X-rays, effective intensity in this case becomes 102 104 times stronger than conventional dispersive crystal analyser. As for resolution, ratio width resolution an SSD can be made comparable choosing suitable radioactive γ-ray...

We have been developing a multiprocessor architecture which executes iterations of loop speculatively in parallel. In this paper, we present speculative memory (SM), order to enable the large-scale speculation supports execution iteration arbitrary size and duration. With SM, programmer can hint explicitly that certain are preferable be executed SM manages multiple values (versions) modified data. also features renaming delayed program codes, could viewed as dynamic code migration. These...

In this paper, we present an e-learning back-end system which cooperates with a learning management (LMS). Our is aimed at fair and effective assessment in class of elementary programming practice. While most LMSs provide basic functions to support various courses, complements such conventional by providing the following specialized functions: syntax check codes, plagiarism detection, automated black-box testing. makes general-purpose LMS more useful for both students teachers low cost.

We have been developing a multiprocessor architecture which creates speculative threads from sequential program and executes them in parallel. In this architecture, we aim at the large-scale speculation supports execution of arbitrary size duration. So, our system must be able to analyze dependency on large amounts memory data. paper, describe outline current design mechanism for dynamic inter-thread analysis, renaming, data management detail. These mechanisms not only enables amount...

Recent simulation studies have shown that a technique of multi-frequency microwave radiometry is feasible for non-invasive measurement deep brain temperatures in the new-born infants. A five-band radiometer system has been developed, and its operation normal electromagnetic environment checked. Five receivers operating with waveguide antenna at center frequencies 1.2, 1.65, 2.3, 3.0 3.6 GHz (0.4 bandwidth) are calibrated using temperature-controlled water-bath. Temperature resolutions...

In this paper, we propose a multithreaded processor architecture which improves machine throughput. our architecture, instructions from different threads (not single thread) are issued simultaneously to multiple functional units, and these can begin execution unless there unit conflicts. This parallel scheme greatly the utilization of unit. Simulation results show that by executing two four in on nine-functional-unit processor, 2.02 3.72 times speed-up, respectively, be achieved over...

Many techniques for parallelizing a sequentially coded program have been developed and put to practical use, but there are many cases in which codes cannot be parallelized because it is impossible assure that their parallel execution does not violate the data dependencies program. To parallelize such programs, we previously proposed speculative memory (SM). With SM, programmers can specify of threads explicitly programs. The SM system manages speculatively read or written by running...

We had proposed a distributed storage system which relocates data blocks autonomously among the nodes. Generally, owing to requirement of exchanging management information frequently, such autonomous block migration tends increase network traffic. Our previous work has presented scheme reduce traffic by appending onto an iSCSI short packet. In this paper, we present propagate utilizing internode communications more aggressively. utilizes read/write packets are exchanged frequently transmit...

In our previous work, we had proposed a distributed storage system which aims to optimize the locations of data blocks on basis their access frequency. order relocate at an appropriate node, each node should collect fresh information about utilization other nodes. However, frequent exchange might become cause network congestion. this paper, propose method improve freshness and suppress traffic. This controls propagation interval according condition node. We also show that Ethernet frames can...

A method was proposed for discrimination of ventricular arrhythmias using fuzzy logic. The classifier uses four features ECG waveforms; amplitude variation ratio, interval peak sharpness, QRS complex width, and assigns each waveform a number 0-100. performance the algorithm evaluated on surface intracardiac electrocardiograms tachycardia (VT), fibrillation (VF) normal sinus rhythm (NSR) in mongrel dogs. NSRs were 90-100 while VFs less than 10. VTs assigned numbers 30-75. An automatic...

Thread-Level Speculation (TLS) is an approach to enhance the opportunity of parallelization by executing tasks in parallel based on assumption that task has no dependencies any earlier program order. But if dependency detected during execution, should be aborted and re-executed. So frequency aborts one factors damage performance speculative execution. In this paper we propose "code shelving" scheme avoid or eliminate penalty abort. We have implemented it our TLS system, which named...

We propose a distributed storage system which relocates data blocks autonomously among the nodes.In order to optimize I/O performance with slight administrative workload, our is aimed at realization of following two functions; (i) Run-time construction tiers from heterogeneous devices, and (ii) Automated block migration tiers.We also show technique reduce management traffic in iSCSI environment.

We have proposed a distributed storage system which dynamically makes tiers and optimizes location of data blocks autonomously. This aims to enhance the I/O performance without remarkable network overhead. Our organizes considering device characteristics. And will be placed in suitable tier according their access pattern.In this paper, we propose method select destination node for migration using an characteristic block migrated. ranks nodes, autonomously configures based on relative...

In this paper, we propose a distributed storage system which relocates data blocks autonomously among the nodes. is composed of heterogeneous nodes, there are performance gaps devices. The tiers made by such in system. When frequently accessed placed on improper tier, may decline. To avoid problem, administrator should periodically investigate state utilization and relocate to proper node. Although makes efficient use devices, administrators' workload quite heavy. Our aimed at realization...

In this paper, we propose a new Hardware Transactional Memory (HTM) system for shared-memory multiprocessor in which elementary processors are connected by single common bus. One of the key features our is modified snoop cache protocol to reduce overheads on transactional memory consistency control. By publishing all data transaction at once when commits, avoids overhead commit, would arise from sequential publication (or write-back main memory) each item otherwise. Another feature...

Thread-level speculation (TLS) is an approach to enhance the opportunity of parallelization programs. A TLS system enables multiple threads begin execution tasks in parallel even if there may be dependency between tasks. When any violation detected, enforces violating thread abort and re-execute task. So, frequency aborts one factors that damage performance speculative execution. This article proposes a new technique named code shelving, which not need abort. It available only for but also...

Transactional Memory (TM) is promising to make parallel programming easier. There have been many hardware implementations of transactional memory (HTM) proposed improve the performance, but they still suffer from some overheads when a transaction commits or aborts. So, we developing novel new HTM design, called DCTM, which enables transactions arbitrary size commit abort in fixed number cycles -- typically one cycle. DCTM stores values data modified into an L1 cache. Each cache checks...

To enlarge the opportunities for parallelizing a sequentially coded program, authors have previously proposed speculative memory (SM). With SM, they can start parallel execution of program by assuming that it does not violate data dependencies in program. When SM system detects violation, recovers computational state and restarts execution. In this article, explore design space implementing software-based system. They compared possible choices following three viewpoints: (1) which waiting...

k-dimensional (k-d) trees are one of the most important data structures in fields engineering and so-called Big Data. In this paper we propose a scheme parallelizing construction k-d tree. Since efficient presorting is required for constructing balanced tree, also developed parallelized heapsort algorithm. The proposed 3.59 times faster than sequential

Heapsort algorithm was found many decades ago, but no parallel heapsort had been presented. In our previous work, we challenged the development of a algorithm. this paper improve partially and analyze performance in detail. As more massive amount data are sorted, or as complex comparison is required for sorting, can sort efficiently.