Yee‐Chia Yeo

ORCID: 0000-0003-1016-1687
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Research Areas
  • Semiconductor materials and devices
  • Advancements in Semiconductor Devices and Circuit Design
  • Semiconductor materials and interfaces
  • Nanowire Synthesis and Applications
  • Photonic and Optical Devices
  • Integrated Circuits and Semiconductor Failure Analysis
  • Semiconductor Quantum Structures and Devices
  • Ferroelectric and Negative Capacitance Devices
  • Silicon Carbide Semiconductor Technologies
  • GaN-based semiconductor devices and materials
  • Silicon and Solar Cell Technologies
  • Phase-change materials and chalcogenides
  • Advanced Memory and Neural Computing
  • Thin-Film Transistor Technologies
  • Chalcogenide Semiconductor Thin Films
  • Diamond and Carbon-based Materials Research
  • Advanced Photonic Communication Systems
  • Electronic and Structural Properties of Oxides
  • Silicon Nanostructures and Photoluminescence
  • Semiconductor Lasers and Optical Devices
  • Metal and Thin Film Mechanics
  • Copper Interconnects and Reliability
  • Ga2O3 and related materials
  • Transition Metal Oxide Nanomaterials
  • Advanced Surface Polishing Techniques

Taiwan Semiconductor Manufacturing Company (Taiwan)
2002-2022

National University of Singapore
2011-2020

Singapore-MIT Alliance for Research and Technology
2016

Nanyang Technological University
2000-2016

Institute of Materials Research and Engineering
2008-2016

Agency for Science, Technology and Research
2006-2016

Massachusetts Institute of Technology
2016

Yale-NUS College
2015

Taiwan Semiconductor Manufacturing Company (United States)
2015

Suzhou Institute of Nano-tech and Nano-bionics
2011

Phase-change random-access memory (PCRAM) is one of the leading candidates for next-generation data-storage devices, but trade-off between crystallization (writing) speed and amorphous-phase stability (data retention) presents a key challenge. We control kinetics phase-change material by applying constant low voltage via prestructural ordering (incubation) effects. A 500 picoseconds was achieved, as well high-speed reversible switching using 500-picosecond pulses. Ab initio molecular...

10.1126/science.1221561 article EN Science 2012-06-21

The dependence of the metal gate work function on underlying dielectric in advanced metal-oxide-semiconductor (MOS) stacks was explored. Metal functions high-κ dielectrics are observed to differ appreciably from their values SiO2 or vacuum. We applied interface dipole theory between and a MOS transistor obtained excellent agreement with experimental data. Important parameters such as slope for like SiO2, Al2O3, Si3N4, ZrO2, HfO2 were extracted. In addition, we also explain weaker n+ p+...

10.1063/1.1521517 article EN Journal of Applied Physics 2002-12-02

This work investigates the electronic band structures of bulk Ge1-xSnx alloys using empirical pseudopotential method (EPM) for Sn composition x varying from 0 to 0.2. The adjustable form factors EPM were tuned in order reproduce features that agree well with reported experimental data. Based on adjusted factors, calculated along high symmetry lines Brillouin zone. effective masses at edges extracted by a parabolic line fit. bowing parameters hole and electron then derived fitting mass...

10.1063/1.4767381 article EN Journal of Applied Physics 2012-11-15

The electronic band structures of wurtzite GaN and InN are calculated by the empirical pseudopotential method (EPM) with form factors adjusted to reproduce features which agree recent experimental data accurate first-principles calculations. electron hole effective masses at Γ point obtained using a parabolic line fit. Further, effective-mass Hamiltonian cubic approximation for semiconductors, edge dispersion k.p is fitted that EPM adjusting parameters. Thus, we derived important structure...

10.1063/1.366847 article EN Journal of Applied Physics 1998-02-01

A new nanowire FinFET structure is developed for CMOS device scaling into the sub-10 nm regime. Accumulation mode P-FET and inversion N-FET with 5 10 physical gate length, respectively, are fabricated. delay (CV/I) of 0.22 ps 0.48 excellent subthreshold characteristics achieved, both very low off leakage cur-rent less than nA/ /spl mu/m. Nanowire operation also explored using 3-D full quantum mechanical simulation.

10.1109/vlsit.2004.1345476 article EN 2004-01-01

We report a numerical simulation study of gate capacitance components in tunneling field-effect transistor (TFET), showing key differences the partitioning between source and drain as compared with MOSFET. A compact model for TFET components, including parasitic inversion capacitances, was built calibrated computer-aided design data. This should be useful further investigation performance circuits containing TFETs. The dependence gate-drain C <sub...

10.1109/led.2010.2047240 article EN IEEE Electron Device Letters 2010-05-26

In this paper, we explore the scaling limits of alternative gate dielectrics based on their direct-tunneling characteristics and gate-leakage requirements for future CMOS technology generations. Important material parameters such as tunneling effective mass are extracted from several promising high-/spl kappa/ first time. We also introduce a figure-of-merit comparing relative advantages various current. Using an accurate gate-current model specifications International Technology Roadmap...

10.1109/ted.2003.812504 article EN IEEE Transactions on Electron Devices 2003-04-01

We explore the scaling limits of alternative gate dielectrics based on their direct tunneling characteristics and leakage requirements for future complementary metal–oxide–semiconductor technology generations. Important material parameters such as effective mass are extracted several promising high-κ dielectrics. also introduce a figure merit comparing relative advantages dielectric candidates. Using an accurate current model specifications from International Technology Roadmap...

10.1063/1.1506941 article EN Applied Physics Letters 2002-09-09

The device physics and electrical characteristics of the germanium (Ge) tunneling field-effect transistor (TFET) are investigated for high performance low power logic applications using two dimensional simulation. Due to band-to-band rate Ge as compared Si, TFET suffers from excessive off-state leakage current Ioff despite its higher on-state Ion. It is shown first time that due drain-side in can be effectively suppressed by controlling drain doping concentration. A lower concentration...

10.1063/1.2924413 article EN Journal of Applied Physics 2008-05-15

Highly reliable characterization of fast transient in NBTI is achieved by performing initial and stressed I-V measurements ultra-short time (100 ns). We further provide evidences that reaction-diffusion (R-D) model can not explain the NBTI, while hole trapping (HT) explains all experimental observations. also establish previous on-the-fly methods are sound except for slow measurement. This caused apparent disagreements among results from different groups using methods, which resolved this...

10.1109/iedm.2006.346776 article EN International Electron Devices Meeting 2006-12-01

We report high-speed photo detection at two-micron-wavelength achieved by a GeSn/Ge multiple-quantum-well (MQW) p-i-n photodiode, exhibiting 3-dB bandwidth (f3-dB) above 10 GHz for the first time. The epitaxy of device layer stacks was performed on standard (001)-oriented 300 mm Si substrate using reduced pressure chemical vapor deposition (RPCVD). results showed promise large-scale manufacturing. To our knowledge, this is also photodiodes-on-Si with direct radio-frequency (RF) measurement...

10.1364/oe.27.005798 article EN cc-by Optics Express 2019-02-14

We report the demonstration of a germanium-tin (Ge0.9Sn0.1) multiple-quantum-well p-i-n photodiode on silicon (Si) substrate for 2 μm-wavelength light detection. Characterization photodetector in both direct current (DC) and radio frequency (RF) regimes was performed. At bias voltage -1 V, dark density 0.031 A/cm2 is realized at room-temperature, which among lowest reported values Ge1-xSnx-on-Si photodiodes. In addition, first time, 3 dB bandwidth (f3dB) around 1.2 GHz achieved Ge1-xSnx...

10.1364/oe.25.015818 article EN cc-by Optics Express 2017-06-27

We present a study on the characterization and modeling of direct tunneling gate leakage current in both N- P-type MOSFETs with ultrathin silicon nitride (Si/sub 3/N/sub 4/) dielectric formed by jet-vapor deposition (JVD) technique. The mechanisms PMOSFETs were clarified. electron hole masses barrier potentials for different mere extracted from measured data using new semi-empirical model. This model was used to project scaling limits JVD Si/sub 4/ based supply voltages various technology...

10.1109/55.877204 article EN IEEE Electron Device Letters 2000-11-01

The device physics of the double-gate tunneling field-effect transistor (DG TFET) is explored through two dimensional simulations. on-state drain current Ion DG TFET, which based on band-to-band tunneling, has a strong dependence silicon film thickness TSi and governing it detailed. It established that at surface very accounts for large part total current. However, substantial Ids contributed by subsurface portion film. Detailed potential distributions show coupling gate electrodes in TFET...

10.1063/1.2748366 article EN Applied Physics Letters 2007-06-25

The dependence of the metal-gate work function on annealing temperature is experimentally studied. We observe increased Fermi-level pinning with temperature. This effect more significant for SiO/sub 2/ than HfO/sub gate dielectric. A metal-dielectric interface model that takes role extrinsic states into account proposed to explain thermal instability. letter provides new understanding control transistors and interfaces.

10.1109/led.2004.827643 article EN IEEE Electron Device Letters 2004-05-01

We report the first study of effect strain on tunneling field-effect transistor (TFET) characteristics. Double-gate silicon TFETs were employed. It was found that tensile increases drain current, whereas compressive reduces current. This is attributed to strain-induced band splitting and carrier repopulation provides guidelines engineering TFETs. An elaborate dependence electrical characteristics TFET temperature also reported. observed on-state current exhibits a positive at low bias...

10.1109/led.2009.2026296 article EN IEEE Electron Device Letters 2009-08-11

Device Design and Scalability of a Double-Gate Tunneling Field-Effect Transistor with Silicon–Germanium Source, Eng-Huat Toh, Grace Huiqi Wang, Lap Chan, Dennis Sylvester, Chun-Huat Heng, Ganesh S. Samudra, Yee-Chia Yeo

10.1143/jjap.47.2593 article EN Japanese Journal of Applied Physics 2008-04-01

The device physics and guiding principles for the design of double-gate tunneling field-effect transistor with silicon-germanium (SiGe) heterojunction source are discussed. Two dimensional simulations were employed to study influence position SiGe∕Si on band-to-band performance. It is established that occurs at a distance ∼4nm from gate edge in region. In order narrower bandgap SiGe play dominant role, overlap between region should be such whole path electrons located SiGe. To harness...

10.1063/1.2823606 article EN Applied Physics Letters 2007-12-10

In this letter, we report the first study of dependence carrier mobility and drive current I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Dsat</sub> Ge xmlns:xlink="http://www.w3.org/1999/xlink">0.958</sub> Sn xmlns:xlink="http://www.w3.org/1999/xlink">0.042</sub> p-channel metal-oxide-semiconductor field-effect transistors (pMOSFETs) on surface orientations. Compressively strained channels were grown (100) (111) substrates. Sub-400°C Si...

10.1109/led.2012.2236880 article EN IEEE Electron Device Letters 2013-01-21

In this letter, sulfur (S) segregation was exploited to attain a record-low electron barrier height (Phi <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">B</sub> <sup xmlns:xlink="http://www.w3.org/1999/xlink">N</sup> ) of 110 meV for platinum-based silicide contacts. Sulfur-incorporated PtSi:C/Si:C contacts were also demonstrated in strained FinFETs with Si:C source/drain stressors. Incorporation at the interface regions provides 51% improvement...

10.1109/led.2009.2017213 article EN IEEE Electron Device Letters 2009-04-10

We demonstrate that a complementary metal-oxide-semiconductor (CMOS) compatible silicon (Si) surface passivation technique effectively suppress the dark current originating from mesa sidewall of Ge(0.95)Sn(0.05) on Si (Ge(0.95)Sn(0.05)/Si) p-i-n photodiode. Current-voltage (I-V) characteristics show could reduce leakage density (Jsurf) photodiode by ~100 times. A low (Jdark) 0.073 A/cm(2) at bias voltage -1 V is achieved, which among lowest reported values for Ge(1-x)Sn(x)/Si photodiodes....

10.1364/oe.23.018611 article EN cc-by Optics Express 2015-07-09

The quest for universal memory is driving the rapid development of memories with superior all-round capabilities in non-volatility, high speed, endurance and low power. Phase-change materials are highly promising this respect. However, their contradictory speed stability properties present a key challenge towards ambition. We reveal that as device size decreases, phase-change mechanism changes from material inherent crystallization (either nucleation- or growth-dominated), to...

10.1038/srep00360 article EN cc-by-nc-sa Scientific Reports 2012-04-11

We investigated the critical thickness (hc) for plastic relaxation of Ge1−xSnx grown by molecular beam epitaxy. films with various Sn mole fraction x (x ≤ 0.17) and different thicknesses were on Ge(001). The strain hc high-resolution x-ray diffraction reciprocal space mapping. It demonstrates that measured values layers are as much an order magnitude larger than predicted Matthews Blakeslee (M-B) model. People Bean (P-B) model was also used to predict in Ge1−xSnx/Ge system. content follow...

10.1063/1.4922529 article EN Applied Physics Letters 2015-06-08
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