A5049163544- Ferroelectric and Negative Capacitance Devices
- Semiconductor materials and devices
- Advanced Memory and Neural Computing
- Ferroelectric and Piezoelectric Materials
- Advancements in Semiconductor Devices and Circuit Design
- MXene and MAX Phase Materials
- Electronic and Structural Properties of Oxides
- Acoustic Wave Resonator Technologies
- Multiferroics and related materials
- Advanced Data Storage Technologies
- Integrated Circuits and Semiconductor Failure Analysis
- Quantum Computing Algorithms and Architecture
- Neural Networks and Reservoir Computing
- Quantum Information and Cryptography
- Quantum and electron transport phenomena
- 2D Materials and Applications
- Thin-Film Transistor Technologies
- Transition Metal Oxide Nanomaterials
- Quantum-Dot Cellular Automata
- Magnetic properties of thin films
- Machine Learning in Materials Science
- Nanowire Synthesis and Applications
- Neuroscience and Neural Engineering
- Magnetic Properties and Applications
- Microwave Dielectric Ceramics Synthesis
Georgia Institute of Technology
2017-2025
Sardar Vallabhbhai National Institute of Technology Surat
2025
Atlanta Technical College
2024
University of California, San Diego
2009-2021
The University of Texas at Dallas
2021
Massachusetts Institute of Technology
2020
Qurtuba University of Science and Information Technology
2020
University of California, Berkeley
2009-2019
Macquarie University
2019
Charles University
2018
We report a proof-of-concept demonstration of negative capacitance effect in nanoscale ferroelectric-dielectric heterostructure. In bilayer ferroelectric, Pb(Zr0.2Ti0.8)O3 and dielectric, SrTiO3, the composite was observed to be larger than constituent SrTiO3 capacitance, indicating an effective layer. Temperature is shown tuning parameter for ferroelectric degree enhancement Landau's mean field theory based calculations show qualitative agreement with effects. This work underpins...
A design methodology of ferroelectric (FE) negative capacitance FETs (NCFETs) based on the concept matching is presented. new mode NCFET operation, called "antiferroelectric mode" proposed, which, besides achieving sub-60mV/dec subthreshold swing, can significantly boost on-current in exchange for a nominal hysteresis. Design considerations different device parameters (FE thickness, EOT, source/drain overlap & gate length) are explored. It suggested that relative improvement performance due...
To further reduce the power dissipation in nanoscale transistors, fundamental limit posed by Boltzmann distribution of electrons has to be overcome. Stabilization negative capacitance a ferroelectric gate insulator can used achieve this boosting transistor voltage. Up now, is only directly observed polymer and perovskite ferroelectrics, which are incompatible with semiconductor manufacturing. Recently discovered HfO 2 ‐based on other hand, ideally suited for application because their high...
We report subthreshold swings as low 8.5 mV/decade over high eight orders of magnitude drain current in short-channel negative capacitance FinFETs (NC-FinFETs) with gate length <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$L_{g}=100$ </tex-math></inline-formula> nm. NC-FinFETs are constructed by connecting a high-quality epitaxial bismuth ferrite (BiFeO <sub...
Abstract Single-crystalline thin films of complex oxides show a rich variety functional properties such as ferroelectricity, piezoelectricity, ferro and antiferromagnetism so on that have the potential for completely new electronic applications. Direct synthesis silicon remains challenging because fundamental crystal chemistry mechanical incompatibility dissimilar interfaces. Here we report integration (down to one unit cell) single crystalline, oxide onto substrates, by epitaxial transfer...
We study the effects of variation ferroelectric material properties (thickness, polarization, and coercivity) on performance negative capacitance FETs (NCFETs). Based this, we propose concept conservative design NCFETs, where any unintentional yet reasonable simultaneous ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\sim \pm 3$ </tex-math></inline-formula> %) in parameters does not result emergence...
We demonstrate room-temperature negative capacitance in a ferroelectric-dielectric superlattice heterostructure. In epitaxially grown of ferroelectric BSTO (Ba0.8Sr0.2TiO3) and dielectric LAO (LaAlO3), was found to be larger compared the constituent (dielectric) capacitance. This enhancement series combination two capacitors indicates that stabilized state Negative observed for superlattices on three different substrates (SrTiO3 (001), DyScO3 (110), GdScO3 (110)) covering large range...
We present a simulation study of the negative capacitance effect incorporating leakage through ferroelectric (FE) capacitor. The dynamics FE is modeled using Landau-Khalatnikov equation. When an and dielectric are simply connected in series without metal contact between them, stabilization remains unchanged irrespective leakage. However, when used, any finite makes it impossible to stabilize at steady state. Nonetheless, voltage applied, configuration enters state as long gate cycled faster...
Ferroelectric FETs (FEFETs) offer intriguing possibilities for the design of low power nonvolatile memories by virtue their three-terminal structure coupled with ability ferroelectric (FE) material to retain its polarization in absence an electric field. Utilizing distinct features FEFETs, we propose a 2-transistor (2T) FEFET-based memory separate read and write paths. With proper co-design at device, cell array levels, proposed achieves non-destructive lower iso-write speed compared...
We demonstrate a nonvolatile single transistor ferroelectric gate memory device with ultra-thin (5.5 nm) Hf <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.8</sub> Zr xmlns:xlink="http://www.w3.org/1999/xlink">0.2</sub> O xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> (HZO) fabricated using self-aligned last process. The FETs are silicon-on-insulator wafers, and the is deposited atomic layer deposition. reported devices have an ON/OFF...
This work presents insights into the device physics and behaviors of ferroelectric based negative capacitance FinFETs (NC-FinFETs) by proposing lumped distributed compact models for its simulation. NC-FinFET may have a floating metal between (FE) dielectric layers charge model represents such device. For without metal, should be used at each point in channel layer will impact local charge. effect has important implications on characteristics as shown this paper. The proposed been implemented...
Crystalline materials with broken inversion symmetry can exhibit a spontaneous electric polarization, which originates from microscopic dipole moment. Long-range polar or anti-polar order of such permanent dipoles gives rise to ferroelectricity antiferroelectricity, respectively. However, the recently discovered antiferroelectrics fluorite structure (HfO2 and ZrO2) are different: A non-polar phase transforms into by breaking upon application an field. Here, we show that this structural...
Negative capacitance FETs (NCFETs) have attracted significant interest due to their steep-switching capability at a low voltage and the associated benefits for implementing energy-efficient Boolean logic. While most existing works aim avoid <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${I}_{D}$ </tex-math></inline-formula> – notation="LaTeX">${V}_{G}$ hysteresis in NCFETs, this paper exploits feature...
We analyze the effects of ferroelectric leakage on performance a negative capacitance field-effect transistor (NCFET), which has an intermediate metallic layer between and high-K dielectric. show that, when designed without taking dielectric into account, NCFET can actually degrade significantlywith respect to that baseline FET. To overcome these detrimental leakage, we propose concept work-function engineering, where metals dissimilar work-functions are used for external gate electrode...
We report the first experimental demonstration of ferroelectric field-effect transistor (FEFET) based spiking neurons. A unique feature (FE) neuron demonstrated herein is availability both excitatory and inhibitory input connections in compact 1T-1FEFET structure, which also reported for time any implementations. Such dual functionality a key requirement bio-mimetic neural networks represents breakthrough implementation third generation (SNNs)-also unsupervised learning clustering on real...
In this letter, we present a compact model and analyze the impact of key parameters on negative capacitance FinFET (NC-FinFET) device operation. The developed solves electrostatics Landau–Khalatnikov equations self-consistently. An experimental NC-FinFET is accurately modeled experimentally calibrated are used to NC-FinFETs performance its dependence several parameters.
This paper presents a ferroelectric FET (FeFET)-based processing-in-memory (PIM) architecture to accelerate the inference of deep neural networks (DNNs). We propose digital in-memory vector-matrix multiplication (VMM) engine design utilizing FeFET crossbar enable bit-parallel computation and eliminate analog-to-digital conversion in prior mixed-signal PIM designs. A dedicated hierarchical network-on-chip (H-NoC) is developed for input broadcasting on-the-fly partial results processing,...
Since the discovery of ferroelectricity in doped/alloyed HfO2 and ZrO2 thin film, many device engineers have been attracted to its sustainable at thickness a few nanometer. While most previous studies mainly focused on ferroelectric properties thermally atomic layer deposited (THALD) Hf0.5Zr0.5O2 (HZO), plasma-enhanced ALD (PEALD) HZO has not received much attention. In this work, direct comparison between two types films is carried out, where we found that tradeoff exists these fabrication...
Conventional resistive crossbar array for in‐memory computing suffers from high static current/power, serious IR drop, and sneak paths. In contrast, the “capacitive” that harnesses transient current charge transfer is gaining attention as it 1) only consumes dynamic power, 2) has no DC paths avoids severe drop (thus, selector‐free), 3) can be fabricated on top of complementary metal–oxide–semiconductor (CMOS) circuits 3D‐stacking. For first time, ferroelectric Hf 0.5 Zr O 2 (HZO) capacitive...
Pseudo-crossbar arrays using ferroelectric field effect transistor (FEFET) mitigates weight movement and allows <i>in situ</i> vector–matrix multiplication (VMM), which can significantly accelerate online training of deep neural networks (DNNs). However, the accuracy DNNs conventional FEFETs is low because non-idealities, such as nonlinearity, asymmetry, limited bit precision, dynamic range updates. The endurance these devices degrades further. Here, we show a novel approach for...
Using "capacitive" crossbar arrays for compute-in-memory (CIM) offers higher energy efficiency compared to "resistive" arrays. The non-volatile capacitive (nvCap) synapse has been recently reported in MFM and MFS stacks with asymmetric electrode interfaces. In this work, a foundry FeFET is leveraged as the first time, where tunable gate-to-drain gate-to-source capacitances ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math...
A non-hysteretic NCFET structure using thin quantum well body combines two future trends synergistically. Ultra-thin is needed to suppress short-channel effects and sub-60mV/decade operation reduce power consumption drastically. happens need ultra-thin as 0.5nm achieve 0.3V operation. We used simulation results of Si illustrate the possibility achieving 10pA/µm I <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OFF</inf> , 200uA/um Ion with...