Low-temperature (77K, 4.2K) operation is proposed for bulk CMOS devices to be used in superfast VLSI applications. Symmetrical variation of the parameters both n-channel and p-channel MOSFETs with respect temperature latch-up immunity makes a very promising device technology at low temperatures. To demonstrate performance advantage circuit temperatures, inverter chains 16-kb static random-access memories (RAMs) 2-/spl mu/m gate length were measured. Average propagation delay an chain has...

This paper presents a framework of age-group classification using facial images under various lighting conditions. Our method is based on the appearance-based approach that projects from original image space into face-subspace. We propose two-phased (2DLDA+LDA), which 2DPCA and LDA. experimental results show new 2DLDA+LDA-based improves accuracy more than conventional PCA-based LDA-based approach. Moreover, effectiveness eliminating dimensions do not contain important discriminative...

The V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t</inf> variability in scaled FinFETs with gate length (L xmlns:xlink="http://www.w3.org/1999/xlink">g</inf> ) down to 25 nm was systematically investigated, for the first time. By investigating oxide thickness (T xmlns:xlink="http://www.w3.org/1999/xlink">ox</inf> dependence of variation (VTV), gate-stack origin, i.e., work-function (WFV) and charge (Q (OCV) origin VTV were successfully...

A flash-erase EEPROM cell which consists of a single floating gate transistor is described. The based on self-aligned double polysilicon stacked structure without select transistor. It programmed and erased by hot electrons at the drain edge similar to UV-EPROM, Fowler-Nordheim tunneling from source, respectively. An asymmetry in source regions introduced enable fast program/erase operation. In addition, an n <sup xmlns:mml="http://www.w3.org/1998/Math/MathML"...

A 19.0mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> 64K×1 SRAM utilizing pulsed-word-line technique, P-well/bipolar technology, and 1.3μm gate MOS transistors, will be described. The RAM has typical address access time of 20ns power dissipation 70mW at 1 MHz cycle time.

A polysilicon edge base contact bipolar technology with a gate array of 48ps and mixed ECL-I <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> L frequency divider operating at 10GHz will be described.

Journal Article Multiobjective Evolutionary Optimization of Training and Topology Recurrent Neural Networks for Time-Series Prediction Get access Hideki Katagiri, Katagiri * Faculty Engineering, Hiroshima University, 1-4-1 Kagamiyama, Higashi-hiroshima, 739-8527, Japan *Corresponding author: katagiri-h@hiroshima-u.ac.jp Search other works by this author on: Oxford Academic Google Scholar Ichiro Nishizaki, Nishizaki Tomohiro Hayashida, Hayashida Takanori Kadoma The Computer Journal, Volume...

Low-temperature (77, 4.2 K) operation is proposed for bulk CMOS devices use in super-fast VLSI applications. Symmetrical variations of both types MOSFET parameters with respect to temperature and latchup immunity make a very promising device technology at low temperatures. To demonstrate the performance advantage circuit temperatures, multipliers two different configurations are designed fabricated gate length 1.3 µm. Multiplication speeds 8.0 6.6 ns obtained K pulsed-p-load/CMOS 77 K, respectively.

Elution of bisphenol A (BPA), chlorinated BPAs (i.e., 3-chlorobisphenol A, sum 3,5-dichlorobisphenol and 3,3′-dichlorobisphenol 3,3′,5-trichlorobisphenol 3,3′,5,5′-tetrachlorobisphenol A) 2,4,6-trichlorophenol (TCP) from lined pipes coated with two epoxy resins were investigated in a 24-month continuous test passing tap water. BPA, BPAs, TCP not detected the water at outlet most cases. However, all these chemicals after 16 h retention. The sums BPA retained usually high when residual...

A new concept for enhancing the focus latitude in optical lithography is proposed that makes it possible to overcome Rayleigh limit depth of focus. The method, called focus-latitude enhancement exposure (FLEX), uses multiple exposures several different focal planes extend image contrast mask pattern along light axis. It confirmed both simulations and experiments patterns with a feature size about half-micrometer can be increased by more than two times using FLEX, compared conventional...

A fully-static 8K×8b RAM using HICMOSII technology with a typical address access time of 65ns and power dissipation 200mW will be discussed. To improve manufacturing yield laser redundancy technique utilizing N+ -i-N+ polysilicon structure was employed.

A Hi-CMOSII static RAM with 8K word by 8 bit organization has been developed. The is fabricated using double polysilicon technology and p- n-channel transistors having a typical gate length of 2 /spl mu/m. device was realized low-power high-speed-oriented circuit design new redundancy that utilizes laser diffusion programmable devices. an address access time 65 ns, operating power dissipation 200 mW, standby 10 mu/W.

We have developed a back-side-illuminated image sensor with burst capturing speed of 5.2 Tpixels per second. Its sensitivity was 252 V/lux·s (12.7 times that front-side-illuminated sensor) in an evaluation. Sensitivity camera system 2,000 lux F90. The increased resulted from optical and time aperture ratios 100% also by increasing higher utilization ratio. ultrahigh-speed shooting the use in-situ storage sensor. Reducing wiring resistance dividing area into eight blocks maximum frame rate to...

The effectiveness of a proposed digital calibration technique for 2-stage single-ended cyclic ADC suitable 33-Mpixel 120-fps Super High-Vision (SHV) CMOS image sensor is demonstrated by implementing an experimental chip. A algorithm improves the nonlinearity correcting errors generated in due to capacitor mismatch, finite gain error, incomplete settling reference voltage and offset error. measured output designed fabricated as chip was digitally calibrated using algorithm. DNL improved...

A Home Energy Management System (HEMS), which enables residential users to effectively manage the energy consumption in their home, can optimize operation schedule of household appliances according environments, e.g. indoor temperature and electricity prices. HEMS monitors environment usage, visually represents consumption, controls appliances, thus helps reduce cost as well maintain users' comfort. The optimal for saving, however, does not always coincident with user's desired because is...

Mutants of flavin mononucleotide-binding protein (FMN-bp) were made by site-directed mutagenesis to investigate the role carboxyl-terminal Leu122 pairing subunit in controlling redox potentials, binding prosthetic group, and forming tertiary quaternary structure. We compared oxidation-reduction FMN-binding properties, higher structures wild-type FMN-bp four mutant proteins (L122Y, L122E, L122K L122-deleted). found that potentials affected mutations. Also, affinities L122 deletion apoproteins...

We have developed an ultrahigh-speed, high-sensitivity portable color camera with a new 300,000-pixel single CCD. The CCD, which has four times the number of pixels our initial model, was by seamlessly joining two 150,000-pixel CCDs. A green-red-green-blue (GRGB) Bayer filter is used to realize single-chip capable ultrahigh-speed video recording at up 1,000,000 frames/sec, and small enough be handheld. also technology for dividing CCD output signal enable parallel, highspeed readout in...

T his paper proposes structural optimization method of a Deep Belief Network (DBN) which consists multiple Restricted Boltzmann Machines (RBMs) and single Feedforward Neural (FNN) using several kinds evolutionary computation methods modularization. The performance, accuracy data classification or prediction, should strongly depend on the structure network. Concretely, number RMBs, nodes in hidden layer RMB. result experiments some benchmarks for image problems by DBN optimized proposed...