Spike-timing-dependent plasticity (STDP) is a popular approach for online learning that determines synaptic weight updates based on the relative timing of temporal events pre-synaptic and post-synaptic spikes. Online very effective fast low power processing locally sensed signals. Moreover, memristor (or "memory resistor") has garnered attention as key component in emerging circuits, due large part to inherent device. Circuits leverage metal-oxide memristors, including HfO <inf...

Memristors provide a tempting solution for weighted synapse connections in neuromorphic computing due to their size and non-volatile nature. However, memristors are unreliable the commonly used voltage-pulse-based programming approaches require precisely shaped pulses avoid failure. In this paper, we demonstrate current-limiting-based that provides more predictable analog memory behavior when reading writing memristive synapses. With our proposed design READ current can be optimized by about...

The synapse is a key element of neuromorphic computing in terms efficiency and accuracy. In this paper, an optimized current-controlled memristive circuit proposed. Our proposed demonstrates reliability the face process variation inherent stochastic behavior memristors. Up to 82% energy optimization can be seen during SET operation over prior work. addition, READ shows up 54% savings. approach also provides more reliable programming traditional methods. This design demonstrated with 4-bit...

Abstract In neuromorphic computing, different learning mechanisms are being widely adopted to improve the performance of a specific application. Among these techniques, spike-timing-dependent plasticity (STDP) stands out as one most favored. STDP is simply managed by temporal information an event, which biologically inspired. However, prior works on focused circuit implementation or software simulation for evaluation. Previous also lack comparative analysis performances implementations. This...

Short-term plasticity (STP) is a synaptic modification process found in biological synapses that increases the computational power of neuronal network. To implement rules, we use memristor-based synapse due to its inherent plasticity. The designed operate low resistance state (LRS) region using current-controlled mechanism account for device non-idealities encountered at high (HRS). In this work, mixed-signal STP circuit design. uses digital part generate pulses initiate weight change, and...

In this paper, in an effort to implement unsupervised learning algorithm for silicon neurons, we present a mixed-signal Leaky Integrate-And-Fire (LIF) neuron with two different integrated homeostasis circuits using programmable leak. The mechanism is realized by controlling the charge accumulation rate on integrator varying leakage external signals. proposed have been simulated 65nm CMOS process and their performances compared existing implementations. Results show that our designs achieve...

Abstract The synapse is a key element circuit in any memristor-based neuromorphic computing system. A memristor two-terminal analog memory device. Memristive synapses suffer from various challenges including high voltage, SET or RESET failure, and READ margin issues that can degrade the distinguishability of stored weights. Enhancing resolution very important to improving reliability memristive synapses. Usually, small for with 4-bit data precision. This work considers step-by-step analysis...

In the post Moore's Law era, neuromorphic computing emerged as a promising solution to overcome von Neumann bottleneck with goal create architectures that operate more like human brain. Many neural processors have been designed in push toward this goal, but developing core architecture is flexible enough take advantage of both digital and analog implementations without system-wide revision has proven be challenge. This paper proposes new (nCore) design achieves multi-context flexibility use...

In this paper, in an effort to emulate the properties of a biological neuron silicon, we design mixed-signal Integrate-And-Fire (IAF) with two different approaches for refractory period mechanism. The approaches, one digital and analog, have been designed behave equivalently, except use external programming signals. Neurons using both blocks simulated 65nm CMOS process their performances quantified terms area power consumption. We find that although analog block can be made smaller than...

Spike-timing-dependent plasticity (STDP) is a widely used technique for online learning that updates synapse weights based on the timing of pre- and post-synaptic spikes. Metal-oxide memristors, including HfO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> , are promising in emerging synaptic circuits due to their inherent plasticity, but non-idealities must be carefully considered design process. In this paper, current-controlled...

To create hardware platforms that are compact, power-efficient, and suitable for online learning, we develop a spike-driven synaptic plasticity (SDSP) circuit Hafnium-Oxide-based memristive neuromorphic core. The core includes configurable integrate-and-fire (IAF) neuron current-controlled synapse, with SDSP modifying weights based on pre-synaptic spikes, the post-synaptic neuron's membrane potential, recent spiking activity. Compared to widely used spike-timing-dependent (STDP), model can...

The synapses are fundamental components of spiking neural networks (SNNs). Although metal-oxide memristors, including Hafnium-Oxide (Hf0 <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> ), offer potential in synaptic circuits, the design process must account for their non-idealities. This paper proposes a current-controlled memristive synapse with limited range operation close to low resistance state (LRS) address device non-idealities...

The synapse is a key element of neuromorphic computing in terms efficiency and accuracy. In this paper, an optimized current-controlled memristive circuit proposed. Our proposed demonstrates reliability the face process variation inherent stochastic behavior memristors. Up to 82% energy optimization can be seen during SET operation over prior work. addition, READ shows up 54% savings. approach also provides more reliable programming traditional methods. This design demonstrated with 4-bit...

Memristors provide a tempting solution for weighted synapse connections in neuromorphic computing due to their size and non-volatile nature. However, memristors are unreliable the commonly used voltage-pulse-based programming approaches require precisely shaped pulses avoid failure. In this paper, we demonstrate current-limiting-based that provides more predictable analog memory behavior when reading writing memristive synapses. With our proposed design READ current can be optimized by about...

Synapse is a key element of any neuromorphic computing system which mostly constructed with memristor devices. A two-terminal analog memory device. Memristive synapse suffers from various challenges such as forming at high voltage, SET, RESET failure, and READ margin or resolution issue between two weights. Enhanced very important to make memristive functionally reliable. Usually, the small for 4-bit data precision. This work considers step-by-step analysis enhance current current-controlled...