Saeid Jamili

ORCID: 0009-0003-8624-4048
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About
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Research Areas
  • Parallel Computing and Optimization Techniques
  • Radiation Effects in Electronics
  • VLSI and Analog Circuit Testing
  • Low-power high-performance VLSI design
  • Speech Recognition and Synthesis
  • Speech and Audio Processing
  • Music and Audio Processing
  • Reinforcement Learning in Robotics
  • Distributed systems and fault tolerance
  • Embedded Systems Design Techniques
  • Ferroelectric and Negative Capacitance Devices
  • Advanced Bandit Algorithms Research
  • Cryptography and Residue Arithmetic
  • Building Energy and Comfort Optimization
  • Advanced Memory and Neural Computing
  • Energy Load and Power Forecasting
  • Solar Radiation and Photovoltaics
  • Numerical Methods and Algorithms
  • Coding theory and cryptography
  • Physical Unclonable Functions (PUFs) and Hardware Security
  • Smart Grid Energy Management
  • Distributed and Parallel Computing Systems
  • Algorithms and Data Compression
  • IoT and Edge/Fog Computing

Sapienza University of Rome
2021-2024

The L3DAS21 Challenge is aimed at encouraging and fostering collaborative research on machine learning for 3D audio signal processing, with particular focus speech enhancement (SE) sound localization detection (SELD). Alongside the challenge, we release dataset, a 65 hours corpus, accompanied Python API that facilitates data usage results submission stage. Usually, approaches to tasks are based single-perspective Ambisonics recordings or arrays of single-capsule microphones. We propose,...

10.1109/mlsp52302.2021.9596248 preprint EN 2021-10-25

High-performance embedded systems with powerful processors, specialized hardware accelerators, and advanced software techniques are all key technologies driving the growth of IoT. By combining techniques, it is possible to increase overall reliability safety these by designing architectures that can continue function correctly in event a failure or malfunction. In this work, we fully investigate integration configurable vector acceleration unit fault-tolerant RISC-V Klessydra-fT03 soft core,...

10.3390/electronics12173574 article EN Electronics 2023-08-24

Integer division is key for various applications and often represents the performance bottleneck due to its inherent mathematical properties that limit parallelization.This paper presents a new datadependent variable latency algorithm, derived from classic non-performing restoring method.The proposed technique exploits relationship between number of leading zeros in divisor partial remainder dynamically detect skip those iterations result simple left shift.While similar principle has been...

10.1109/tc.2024.3386060 article EN cc-by IEEE Transactions on Computers 2024-04-08

Reconfigurable processors are hardware architectures that allow for the dynamic configuration of processing resources to optimize performance and power consumption, using partial reconfiguration modify a portion design or update it without affecting entire system. In this work, we present an automatic technique leverages machine learning (ML) algorithms automatically select optimal general-purpose accelerator according workload reconFigure architecture at run-time. The problem is formulated...

10.1109/prime58259.2023.10161944 article EN 2023-06-18

Integer division is key for various applications and often represents the performance bottleneck due to its inherent mathematical properties that limit parallelization. This work proposes four 32bit data-dependent-latency schemes, derived from classic non-performing restoring algorithm. The proposed technique exploits relationship between number of leading zeros in divisor partial remainder dynamically detect skip those iterations result a simple left shift. While similar principle has been...

10.36227/techrxiv.170905712.21922755/v1 preprint EN cc-by 2024-02-27

Hyperdimensional Computing (HDC) is a bioinspired learning paradigm, that models neural pattern activities using high-dimensional distributed representations.HDC leverages parallel and simple vector arithmetic operations to combine compare different concepts, enabling cognitive reasoning tasks.The computational efficiency parallelism of this approach make it particularly suited for hardware implementations, especially as lightweight, energy-efficient solution performing tasks on...

10.36227/techrxiv.171656291.17399753/v1 preprint EN cc-by 2024-05-24

The L3DAS21 Challenge is aimed at encouraging and fostering collaborative research on machine learning for 3D audio signal processing, with particular focus speech enhancement (SE) sound localization detection (SELD). Alongside the challenge, we release dataset, a 65 hours corpus, accompanied Python API that facilitates data usage results submission stage. Usually, approaches to tasks are based single-perspective Ambisonics recordings or arrays of single-capsule microphones. We propose,...

10.48550/arxiv.2104.05499 preprint EN cc-by arXiv (Cornell University) 2021-01-01
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