A5108086170- Radio Frequency Integrated Circuit Design
- Advancements in PLL and VCO Technologies
- Analog and Mixed-Signal Circuit Design
- Microwave Engineering and Waveguides
- Electromagnetic Compatibility and Noise Suppression
- Acoustic Wave Resonator Technologies
- Advancements in Semiconductor Devices and Circuit Design
- CCD and CMOS Imaging Sensors
- Advanced MEMS and NEMS Technologies
- Advanced Power Amplifier Design
- Photonic and Optical Devices
- Semiconductor materials and devices
- Gas Dynamics and Kinetic Theory
- Magneto-Optical Properties and Applications
- Magnetic properties of thin films
- Spacecraft and Cryogenic Technologies
- Aerospace Engineering and Energy Systems
- Multiferroics and related materials
- Neuroscience and Neural Engineering
- Sensor Technology and Measurement Systems
- Semiconductor Quantum Structures and Devices
- GaN-based semiconductor devices and materials
- Copper Interconnects and Reliability
- Advanced Photonic Communication Systems
Cornell University
2025
Beihang University
2024
Auburn University
2007-2014
Georgia Institute of Technology
2010
Institute of Semiconductors
2006
Chinese Academy of Sciences
2006
Computer Network Information Center
2006
Abstract Topological states have garnered enormous interest in both magnetic and ferroelectric materials for promising candidates of next-generation information carriers. Especially, multi-order topological structures with modulative charges are multi-state storage. Here, by engineering boundary conditions, we directly observe the self-assembly two-order radial vortices high-density BiFeO 3 nanostructures. The as-observed vortex features a doughnut-like out-of-plane polarization distribution...
This paper presents an X-band chirp radar transceiver with bandwidth reduction for range detection. The includes a super-heterodyne receiver including ADC, direct-digital synthesizer (DDS) based transmitter and phase-locked loop (PLL) synthesizer. In modified Weaver architecture, the down-converted baseband signal is further mixed another through stretch processing. resulting waveform greatly reduced thus relaxes power requirements of on-chip ADC. Therefore, proposed achieves reductions...
This paper presents an 8-18 GHz wideband receiver with recursive super-heterodyne topology. A multi-feedback technology is utilized in the LNA design for input matching over wide frequency range X- and Ku-band. In order to save power, both RF IF signals share a tunable transconductance stage. The output of first mixer fed back into stage amplification manner, which significantly enhances gain tuning without increasing power. MMIC implemented 0.13 SiGe BiCMOS achieves 6.7-7.8 dB noise figure....
This paper presents a sixth order Butterworth switched capacitor (SC) low pass filter with radiation-hardened-by-design (RHBD) for cryogenic applications. Implemented in 0.5μm SiGe BiCMOS technology, this SC is capable of operating over an ultra-wide temperature (UWT) range from −180°C to 120°C and under high-energy particle radiation environment on the lunar surface. first filter, 300#x00B0;C RHBD, reported so far. The measured results show that approximates response 120°C. clock-to-cutoff...
This paper describes the design, implementation, and characterization of a monolithic charge amplification channel for use as piezoelectric sensor front-end in extreme environment applications. <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">12</sup> The design leverages 50 GHz peak-f <sub xmlns:xlink="http://www.w3.org/1999/xlink">T</sub> SiGe BiCMOS technology platform to achieve functionality across wide-temperature range from -180°C 120°C....
In this paper, an 8 – 18 GHz wideband low noise amplifier (LNA) with active balun fabricated in a 0.13-µ m SiGe BiCMOS technology was presented. The LNA achieves 16-dB of gain 1.5 dB variation over the 8GHz to frequency band and matched input less than −9 reflection. minimum figure (NF) is 5 at increases 6 18GHz. measured IIP3 −15-dBm 17 mA total current consumption from 2.2V supply.
A single-chip X-band chirp radar transceiver with direct digital synthesis (DDS) for generation is presented. The chip, including receiver, transmitter, quadrature DDS, phase-locked loop (PLL) and analog to converter (ADC), has been implemented in a 0.13μm BiCMOS technology. stretch processing technique employed translate the time interval between received transmitted signals single tone at baseband output greatly reduced bandwidth, which allows use of low-cost ADC input bandwidth 10MHz...
This letter presents a low noise amplifier (LNA) RFIC with notch filter implemented in 0.13 μm SiGe BiCMOS technology. The LNA/filter combination utilizes Q-enhanced techniques to achieve high gain and image rejection ratio (IRR) simultaneously. operates at 7.27 GHz achieves 22.5 dB an IIR of 70 dB. measured figure IIP3 the LNA are better than 5.1 -13 dBm, respectively. dissipates 21 mW power 1.7 V supply.
This paper presents an 8–18GHz wideband receiver with superheterodyne topology. In order to save power, both RF and IF signals share the tunable transconductance stage. The output of first mixer is fed its input stage for amplification in a recursive manner, which significantly enhances gain tuning without increasing power. MMIC implemented 0.13um SiGe BiCMOS technology achieves 6.7–7.8dB noise figure (NF). average voltage measured as 53dB maximum 20dB continual 36dB discrete tuning. P1dB...
In this paper, a new tunable CMOS resistor is proposed. The resistance inversely proportional to bias current, provide the with wider tuning range. And transistors, composing active resistor, work at saturation region achieve very large within small area. As an example, low pass RC filter using realized in 0.5-mum technology reported. measured result shows that cutoff frequency of can be widely tuned from 5 kHz 1.9 MHz. total harmonic distortion (THD) stays lower than -40 dB for input signal...
This paper represents a LC VCO with AAC (Auto Amplitude Control), in which PMOS FETs are used as active components, and the varactors directly connected to ground widen Kvco linear range. The circuitry adds little noise provides it robust performance over wide temperature carrier frequency is fabricated 50-GHz 0.35-μm SiGe BiCMOS process. measurement results show that has -127.27-dBc/Hz phase at 1-MHz offset gain of 32.4-MHz/V between 990-MHz 1.14-GHz. whole circuit draws 6.6-mA current from...
The paper presents the design of a wideband low noise amplifier (LNA) with self-healing technology that can simultaneously adjust both peak gain frequency and input matching to operating frequency. proposed LNA is also adjustable. implemented in 0.13um SiGe BiCMOS technology. be adjusted from 4.5GHz 7.8GHz. achieves typical 19dB 14dB continuous tuning range. measured below -12dB over entire band. figure 4.2dB at 7.8GHz, output 1dB compression point -9dBm. dissipates 52mW power.
This paper presents a 12-bit 5MS/s pipeline analog-to-digital converter implemented in 0.5µm CMOS technology for aerospace extreme environment applications with cryogenic and radiation tolerant capability. It is capable of working under ultra-wide temperature range from −180°C to +120°C at ultra low −230°C. To achieve higher sampling rate lower power, time-interleaved architecture operational amplifiers sharing technique are used. The ADC chip consumes only 30.4mW −230°C 3.3V supply voltage....
This paper presents the design of a wide-band low-noise amplifier (LNA) implemented in 0.35 μm SiGe BiCMOS technology for cable (DVB-C) and terrestrial (DVB-T) tuner applications. The LNA utilizes current injection to achieve high linearity. Without using inductors, achieves 0.1-1GHz wide bandwidth 18.8-dB gain with less than 1.4-dB variation. noise figure(NF) wideband is 5dB, its 1-dB compression point -2 dBm IIP3 8dBm. dissipates 120mW power 5-V supply.
The wideband high-linearity mixers for a double conversion cable TV tuner is presented. up-conversion mixer converts the input signal from 100MHz to 1000 MHz intermediate frequency (IF) of 1 GHz above. And down-conversion back. degeneration resistors are used improve linearity. implemented in 0.35μm SiGe technology. Input power at 1dB compression point can reach +14.23dBm. lowest noise figure 17.5dB. two consume 103mW under supply voltage 5 V.
This paper presents an X-band chirp radar receiver with bandwidth reduction for range detection. The proposed is composed primarily of a RF front end reconfigurable bandwidth, baseband and ADC. uses dual down-conversion architecture to convert the signal signal, which further mixed replica transmitted through stretch processing in modified Weaver receiver. resulting waveform greatly reduced thus relaxes power requirements de-stretched single tone fixed frequency that related target....
High speed channel (HSC) resistive sensor interface is an analog sampling designed for measuring the resistance variations with data rate at 5 kHz. It measures external variation and digitizes received signal using a 12-bit to digital converter (ADC). The HSC includes Wheatstone bridge programmable configurations, high voltage cap stack sampler, 6 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sup> order Butterworth switching capacitor...
In this paper, a wide-band low noise amplifier, two mixers and VCO with its buffers implemented in 50GHz 0.35mum SiGe BiCMOS technology for dual-conversion digital TV tuner front-end is presented. The LNA up-converting mixer utilizes current injection to achieve high linearity. Without using inductors, the achieves 0.1-1GHz wide bandwidth 18.8-dB gain less than 1.4-dB variation. figure of 5dB 1dB compression point -2 dBm. IIP3 25-dBm. measurement results show that has -127.27-dBc/Hz phase at...
A wide-band variable-gain LNA, RF VGA and a mixer implemented in 50GHz 0.5μm SiGe BiCMOS technology for DVB-H tuner front-end is presented. The LNA uses the distribution structure with fixed gain stage to get 20dB variable low noise. achieves 600MHz bandwidth less than 6dB noise figure +3-dBm of IIP3 at max gain. carefully designed 30dB 5dB per step 16-dBm Two mixers I/Q signals are 22dBm IIP3. chip consumes 150mW power 3.3-V supply.
In this paper, a wide-band low noise amplifier, two mixers and VCO with its buffers implemented in 50GHz 0.35mum SiGe BiCMOS technology for dual-conversion digital TV tuner front-end is presented. The LNA up-converting mixer utilizes current injection to achieve high linearity. Without using inductors, the achieves 0.1-1GHz wide bandwidth 18.8-dB gain less than 1.4-dB variation. figure of 5dB 1dB compression point -2 dBm. IIP3 25-dBm. measurement results show that has -127.27-dBc/Hz phase at...