A5088672720- Advancements in Semiconductor Devices and Circuit Design
- Radio Frequency Integrated Circuit Design
- Semiconductor materials and devices
- Semiconductor Quantum Structures and Devices
- Integrated Circuits and Semiconductor Failure Analysis
- Photonic and Optical Devices
- Carbon Nanotubes in Composites
- Graphene research and applications
- Electrostatic Discharge in Electronics
- Semiconductor Lasers and Optical Devices
- Silicon Carbide Semiconductor Technologies
- Nanowire Synthesis and Applications
- 3D IC and TSV technologies
- Low-power high-performance VLSI design
- Radiation Effects in Electronics
- Advanced Photonic Communication Systems
- Thin-Film Transistor Technologies
- Thermal properties of materials
- Superconducting and THz Device Technology
- Advanced Memory and Neural Computing
- Microwave Engineering and Waveguides
- GaN-based semiconductor devices and materials
- Quantum and electron transport phenomena
- Semiconductor materials and interfaces
- Microwave and Dielectric Measurement Techniques
Laboratoire de l'Intégration du Matériau au Système
2015-2024
Institut Polytechnique de Bordeaux
2015-2024
Université de Bordeaux
2015-2024
Centre National de la Recherche Scientifique
2014-2024
Infection et inflammation
2010-2012
CEA LETI
2012
Commissariat à l'Énergie Atomique et aux Énergies Alternatives
2012
III V Lab
2012
Laboratoire des Technologies de la Microélectronique
2005-2008
Université de Limoges
2005
This paper examines aspects of design technology required to explore advanced logic-circuit using carbon nanotube field-effect transistor (CNTFET) devices. An overview current types CNTFETs is given and highlights the salient characteristics each. Compact modeling issues are addressed new models proposed implementing: 1) a physics-based calculation energy conduction sub-band minima allow realistic analysis impact CNT helicity radius on dc characteristics; 2) descriptions ambipolar behavior...
A new scalable electrical compact model for the Graphene FET devices is proposed. Starting from Thiele's quasianalytical model, equations are modified to be fully compatible with SPICE-like circuit simulation. Compared Meric et al. charge improved. This large signal has been implemented in Verilog-A code and can used simulation a standard design environment such as Cadence or ADS. verified using different measurements literature, furthermore, its scalability demonstrated.
This paper presents Si/SiGe:C and InP/GaAsSb HBTs which feature specific assets to address submillimeter-wave THz applications. Process modeling status challenges are reviewed. The topics of thermal substrate effects, reliability, HF measurements also discussed.
<para xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> We present a computationally efficient physics-based compact model designed for the conventional CNTFET featuring MOSFET-like operation. A large part of its novelty lies on implementation new analytical channel charge. In addition, Boltzmann Monte Carlo (MC) simulation is performed with challenge to cross-link this technique modeling formulation. The comparison electrical characteristics obtained...
This paper presents a computationally efficient physics-based compact model for the Schottky barrier (SB) carbon nanotube field-effect transistor (CNTFET). includes new analytical formulation of channel charge, taking into account influence source and drain SBs. Compact simulation results (- characteristic density charge) as well Monte Carlo results, which are provided by recent work, will be given compared to each other also experimental data validate used approximations. Good agreement is...
In this article, we present the first detailed experimental study of electrothermal effects in 3-D vertical gate-all-around (GAA) junctionless nanowire transistors (JLNTs). contrast with conventional CMOS technologies, JLNTs exhibit steady increase current temperature owing to weak mobility degradation highly doped nanowires. Consequently, work, proposed novel methods for extracting thermal resistance using dc and low-frequency (LF) S-parameter measurements. Experimental results obtained...
In this paper, an accurate compact model based on physical mechanisms for dual-gate bilayer graphene FETs is presented. This developed the 2-D density of states and implemented in Verilog-A. Furthermore, equations describing behavior source drain access regions under back-gate bias are proposed. The accuracy large-signal has been verified by comparison with measurement data from literature.
In this paper, we report a physics-based compact model for monolayer graphene field-effect transistors (m-GFETs) based on the 2-D Density of States and drift-diffusion equation. Furthermore, Ward-Dutton charge partitioning scheme has been incorporated to extending its capabilities AC transient simulations. The validated through comparison with DC RF measurements from two different long-channel m-GFET technologies. Moreover, values parasitic elements included in are extracted dedicated test...
This review paper reports the prerequisites of a monolithic integrated terahertz (THz) technology capable meeting network capacity requirements beyond-5G wireless communications system (WCS). Keeping in mind that signal generation for networks relies on power loss management, we propose single computationally efficient software design tool featuring cutting-edge optical devices and high speed III–V electronics optoelectronic circuits (OEICs) monolithically Indium-Phosphide (InP) die. Through...
Today, extensive research has focused on heat propagation in emerging nanoelectronic devices. With advances the fabrication of nanowire (NW) transistors, thermal management become a critical issue cooling strategies and conducting materials. In this article, we present novel multiphysics analysis nanoscale transport 18-nm vertical junctionless gate-all-around (GAA) silicon NW transistors. Based analysis, developed new computational model derived from Guyer–Krumhansl equation (GKE) for...
Abstract Addressing temperature hot-spots resulting from self-heating effects (SHE) poses a significant challenge in the design of emerging nanoscale transistors, such as vertical junctionless nanowire field-effect transistors (VNWFETs), due to reduced thermal conductivity. Consequently, electrothermal modeling becomes crucial for comprehensive understanding underlying physical mechanisms governing carrier degradation and conduction these devices. In this study, we present an enhanced...
On the basis of acquired knowledge, paper present a DC compact model designed for conventional CNTFET (C-CNTFET) featuring doping profile similar to n-MOSFET. The specific enhancement lies on implementation physical based calculation minima energy conduction subbands. This improvement allows realistic analysis impact CNT helicity and radius characteristics. purpose is enable circuit designers challenge potentialities performing logical or analogical functionalities within complex circuits
This paper presents the implementation of band-to-band tunneling (BTBT) mechanisms into compact model a conventional carbon nanotube transistor FET featuring MOSFET-like operation. Appropriate equations enable calculation BTBT current as well charge pileup in channel. To ensure accuracy and validate equation set, simulation results are methodically compared with nonequilibrium Green function ones. Afterward, investigations on effects respect to figures merits circuit have led draw conclusion...
A compact model for dual-gate (DG) carbon-nanotube field-effect transistors (FETs) (CNTFETs) is presented. This includes the most significant mechanisms present in DG CNTFETs such as Schottky barrier at metal-nanotube interface, charge and electrostatic modeling, band-to-band tunneling effect, quasi-ballistic transport through Landauer equation. Also, structure of our CNTFET its associated equations are versatile can be used to different kinds 1-D ballistic FETs, graphene-nanoribbon-based...
We present and validate a physics-based model to describe the underlying mechanisms of hot-carrier degradation in bipolar transistors. Our analysis is based on deterministic solution coupled system Boltzmann transport equations for electrons holes. The full-band provides energy distribution functions charge carriers interacting with passivated Si-H bonds along oxide interface. simulation results assert dominant role hot holes emitter-base spacer interface long-term an n-p-n SiGe...
This paper focuses on efficient reliability analysis methodologies applicable for beyond-5G communication systems demonstrated prospective terahertz (THz) technologies. Recently, a lot of the research interests have grown optoelectronic integration which requires simultaneous management electronic and optical modules. These technologies are evolving very rapidly, providing higher complexity, thereby increasing their susceptibility to stress environments (i.e., mutual self-heating) finally...
In this paper, we report on the development of a versatile compact model for graphene FETs (GFETs). Aging studies have been performed GFETs via bias stress measurements and aging laws were implemented in model, including failure mechanisms GFETs. The are identified to be originated from generation traps interface states causing shift transfer characteristics mobility degradation, respectively. For trap density is prestress modulate channel potential. Moreover, state reflect modification...
This paper presents a new physical compact model for interface state creation due to hot-carrier degradation in advanced SiGe heterojunction bipolar transistors (HBTs). An analytical trap density is developed through an accurate solution of the rate equation describing generation and annihilation traps. The aging law has been derived implemented terms base recombination current parameters HiCuM its accuracy validated against results from long-term tests performed close safe-operating areas...
This paper presents an extension of a ballistic compact model to the case nonballistic transport for conventional carbon nanotube FET featuring MOSFET-like operation. A large part novelty lies on analytical implementation acoustic phonon (AP) and optical (OP) scattering mechanism. To carry out this implementation, some simplifications theoretical description are proposed while staying as close possible physics keeping high-speed simulation good convergence capability model. The results...
In this paper, self-heating of a state-of-the-art SiGe:C BiCMOS Heterojunction Bipolar Transistor (HBT) is studied by means 3D thermal TCAD simulations. Steady-state, large signal and small transient simulations are performed on different device structures to investigate the impact backend layers impedance (Z <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TH</inf> ). addition, simulation results verified DC low frequency measurements found be...
We demonstrate a 4-mask HBT module, which enables the integration of three high performance self-aligned SiGeC HBTs into 0.13/spl mu/m SOI CMOS technology. Static and dynamic transistor characteristics are described compared with simulation results bulk device performances.