Bertrand Ardouin

ORCID: 0000-0003-0432-9818
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About
Contact & Profiles
Research Areas
  • Radio Frequency Integrated Circuit Design
  • Advancements in Semiconductor Devices and Circuit Design
  • Photonic and Optical Devices
  • Microwave Engineering and Waveguides
  • Semiconductor materials and devices
  • Semiconductor Quantum Structures and Devices
  • Integrated Circuits and Semiconductor Failure Analysis
  • Semiconductor Lasers and Optical Devices
  • Optical Network Technologies
  • Advanced Photonic Communication Systems
  • Analog and Mixed-Signal Circuit Design
  • Silicon Carbide Semiconductor Technologies
  • Microwave and Dielectric Measurement Techniques
  • VLSI and Analog Circuit Testing
  • Advancements in PLL and VCO Technologies
  • Low-power high-performance VLSI design
  • Advancements in Photolithography Techniques
  • VLSI and FPGA Design Techniques
  • Electromagnetic Compatibility and Noise Suppression
  • CCD and CMOS Imaging Sensors
  • Magnetic Properties and Applications
  • Optimal Experimental Design Methods
  • Superconducting and THz Device Technology
  • Real-Time Systems Scheduling
  • Electromagnetic Compatibility and Measurements

III V Lab
2023-2024

Thales (France)
2024

Nokia (France)
2023-2024

Commissariat à l'Énergie Atomique et aux Énergies Alternatives
2023-2024

CEA LETI
2023

Laboratoire de l'Intégration du Matériau au Système
2000-2017

Institut Polytechnique de Bordeaux
2017

Université de Bordeaux
2001-2003

Sub-mm circuit design requires accurate on-wafer characterization of passive and active devices. In industry, these devices is often performed with off-wafer short-open-load-thru (SOLT) calibration. this paper, the validity procedure above 110 GHz investigated by an exhaustive study alumina calibration using measurement electromagnetic (EM) simulation up to 500 GHz. The EM at two different levels, first intrinsic level under test for reference afterward probe simulate standards used in or...

10.1109/tthz.2018.2884612 article EN IEEE Transactions on Terahertz Science and Technology 2018-12-04

This paper focuses on efficient reliability analysis methodologies applicable for beyond-5G communication systems demonstrated prospective terahertz (THz) technologies. Recently, a lot of the research interests have grown optoelectronic integration which requires simultaneous management electronic and optical modules. These technologies are evolving very rapidly, providing higher complexity, thereby increasing their susceptibility to stress environments (i.e., mutual self-heating) finally...

10.1109/tdmr.2017.2710303 article EN IEEE Transactions on Device and Materials Reliability 2017-05-31

An overview on the compact modeling activities within DOTSEVEN project is given. Issues such as geometry scaling, substrate coupling and thermal effects well HICUM Level 2 features enabling accurate of linear non-linear characteristics latest generation SiGe HBTs are discussed. Furthermore, experimental results for most important DC small-signal selected examples advanced from two different technologies presented. Model verification issues related to limited on-wafer high-frequency...

10.1109/bctm.2015.7340560 article EN 2015-10-01

A compact bipolar transistor model was presented in Part I that combines the simplicity of SPICE Gummel-Poon (SGPM) with some major features HICUM. The new model, called HICUM/L0, is more physics-based and accurate than SGPM but at same time, from a computational point view, suitable for simulating large circuits. In II, parameter determination procedure described demonstrated variety SiGe process technologies.

10.1109/ted.2005.862246 article EN IEEE Transactions on Electron Devices 2006-01-25

We investigate the bias, temperature, and frequency dependence of two III–V double heterojunction bipolar transistors technologies based on InGaAs/InP GaAsSb/InP processes, using a HiCuM/L2 compact model-based multigeometry scalable parameter extraction methodology. Very good agreement between model simulations experimental data is demonstrated. Transistor currents junction capacitances show very scaling, thereby allowing separation intrinsic peripheral effects. Prediction future HBT...

10.1109/ted.2018.2876551 article EN IEEE Transactions on Electron Devices 2018-10-31

A multiscale technology computer-aided design (TCAD) simulation methodology is presented to calculate the intrinsic transit time of InP double heterojunction bipolar transistors (DHBTs). 2-D hydrodynamic (HD) simulator employed produce dc characteristics and electrostatic potentials selected devices. Utilizing cuts obtained potential profiles as inputs, a 1-D full-band, atomistic quantum transport (QT) solver then deployed determine ballistic electronic properties these components. The times...

10.1109/ted.2019.2946514 article EN IEEE Transactions on Electron Devices 2019-11-01

InP double heterojunction bipolar transistors (InP DHBTs) are one of the key technologies considered for terahertz (THz) applications. The improvement their frequency performance is challenging and strongly dependent on various parameters (manufacturing process, geometry, epitaxial structure). In this article, a novel method developed to take into account these predict technology. This approach consists rebuilding S-parameter matrix small-signal model. Elements small signal model identified,...

10.1109/tcad.2023.3257706 article EN IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 2023-03-15

This paper presents an accurate and efficient extraction methodology for the main parameters of bipolar compact model HICUM. The proposed flow was successfully applied to several transistors fabricated with various advanced SiGe BiCMOS technologies.

10.1109/bipol.2002.1042899 preprint EN 2003-06-25

This paper presents a methodology for compact model evaluation and validation at circuit level RF mm-wave applications. Accurate models are prerequisite efficient design but currently modeling engineers lack of suitable verification procedures. In this work we detail to fulfill these requirements together with examples, starting from the simplest differential pair most advanced four stage LNA working 220GHz. It is shown that complete hierarchy circuits (from complex) provides new perspective...

10.1109/csics.2015.7314492 preprint EN 2015-10-01

This letter presents a small area mm-wave CMOS LC-VCO with vertically-coiled solenoid inductor. Based on the multi-layers of metals and vias among them in process, inductor is formed inductance at order hundred pHs. An accurate compact model for over broad frequency range has been developed, method to analytically extract parameters also presented details. A 24 GHz was implemented 90 nm process. It occupies core 250 μm × 85 μm, measured phase noise -122 dBc/Hz@ 10 MHz when output 23.6 GHz.

10.1109/lmwc.2016.2537742 article EN IEEE Microwave and Wireless Components Letters 2016-03-17

This paper presents a new method based on HF measurements to determine the intrinsic and extrinsic base-emitter base-collector junction capacitances parameters of bipolar transistors. After measuring total capacitance, this describes how split value between an (C/sub ji/) jx/) part versus bias. From resulting capacitance voltage behaviour, C/sub ji/(V) jx/(V), specific model j0/, V/sub j/, /spl gamma//sub 1/) can be extracted for as well part. The results introduced in recent compact models...

10.1109/bipol.2001.957870 preprint EN 2002-11-13

This paper presents a new physics-based method for reliability prediction and modeling of Integrated Circuits (ICs). By implementing transistor degradation mechanisms via differential equations in the compact model, aging circuit can be simulated over (accelerated) time under real conditions. Actually, each integrates voltage, current temperature stress it suffers which results (slowly) varying model parameters time. Due to its straightforward implementation commercial Computer Aided Design...

10.1109/essderc.2012.6343334 preprint EN 2012-09-01

This paper presents a new physics-based method for reliability prediction and modeling of Integrated Circuits (ICs). By implementing transistor degradation mechanisms via differential equations in the compact model, aging circuit can be simulated over (accelerated) time under real conditions. Actually, each integrates voltage, current temperature stress it suffers which results (slowly) varying model parameters time. Due to its straightforward implementation commercial Computer Aided Design...

10.1109/esscirc.2012.6341253 article EN 2012-09-01

An on-wafer TRL methodology based on meander type transmission lines was developed in the perspective of automated on-waver calibration. The calibrations using and standard straight showed no significant difference when applied to characterize a single SiGe HBT up 110 GHz under multiple bias points.

10.1109/eumc.2016.7824358 preprint EN 2016-10-01

This article reports a detailed approach toward optimization of on-wafer thru-reflect-line (TRL) calibration structures for submillimeter-wave characterization state-of-the-art indium-phosphide (InP) technology, validated by thorough experimentation and electromagnetic (EM) simulation. The limitations the existing RF test high-frequency measurements beyond 110 GHz are analyzed through EM Using an procedure based on raw simulated data, TRL were developed fabricated in subsequent run this...

10.1109/ted.2020.3033834 article EN IEEE Transactions on Electron Devices 2020-11-12

This paper describes a new approach for modeling the self-heating phenomena in silicon germanium (SiGe) heterojunction bipolar transistors (HBT). is based on physical resolution of heat transfer differential equation. The model compared to electro-thermal used most commercial circuit simulators. produces better agreement with measured data. For its validation, it implemented into recent compact model.

10.1109/bipol.2002.1042895 preprint EN 2003-06-25

In this article, we report on the generation of 100-GBd (200-Gb/s) 4-level pulse-amplitude modulation (PAM-4) optical signal, without any support digital signal processing (DSP) nor off-line equalisation. This is achieved in using an uncooled indium phosphide (InP) analog-multiplexer (AMUX)-driver and a thin film lithium niobate (TFLN) Mach-Zehnder modulator (MZM) assembly, with -3-dB electro-optical bandwidth excess 85 GHz. result paves way for low-power DSP-free beyond-1-Tb/s transceivers...

10.1109/bcicts54660.2023.10310947 article EN 2023-10-16

This paper presents a extraction procedure for the transit time parameters of HICUM bipolar compact model. The routines use as input measured small-signal current gain in -20 dB/decade falloff region function collector and collector-emitter (or collector-base) voltage. All are extracted straightforward manner, no optimisation is necessary. Especially critical value ICK determined self consistent way.

10.1109/bipol.2001.957868 preprint EN 2002-11-13

Determination methods for the emitter resistance of bipolar transistors are reviewed and evaluated with respect to constraints introduced by modern SiGe:C HBT processes f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">MAX</sub> reaching 500GHz [1]. Maximum transistor performance is obtained at ever higher current densities, involving huge self-heating effect which dramatically degrades accuracy existing methods. A new parameter extraction...

10.1109/bctm.2011.6082779 article EN 2011-10-01

In this paper the modeling results of a given InP/InGaAs/InP DHBT technology (0.7 × 7 μm emitter area) have been shown with two advanced compact models, HICUM L0 and Agilent HBT. Shortcomings these models pointed out their suitability for high frequency devices has discussed.

10.1109/miel.2010.5490456 preprint EN 2010-05-01
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