- Parallel Computing and Optimization Techniques
- Advanced Malware Detection Techniques
- Embedded Systems Design Techniques
- Interconnection Networks and Systems
- Network Security and Intrusion Detection
- Software Testing and Debugging Techniques
- Network Packet Processing and Optimization
- Digital and Cyber Forensics
- Context-Aware Activity Recognition Systems
- Caching and Content Delivery
- Advanced Data Storage Technologies
- IoT and Edge/Fog Computing
- Coding theory and cryptography
- Cryptographic Implementations and Security
- Cloud Computing and Resource Management
- Cryptography and Data Security
- Anomaly Detection Techniques and Applications
- Security and Verification in Computing
- Cybercrime and Law Enforcement Studies
- DNA and Biological Computing
- Speech and Audio Processing
- Green IT and Sustainability
- Real-Time Systems Scheduling
- User Authentication and Security Systems
- scientometrics and bibliometrics research
Yeungnam University
2015-2025
Youngsan University
2015
Seoul National University
2007-2013
Gangneung–Wonju National University
2012
In order to meet the increasing demand for high performance in smartphones, recent studies suggested mobile cloud computing techniques that aim connect phones adjacent powerful servers throw their computational burden servers. These often employ execution offloading schemes migrate a process between machines during its execution. offloading, code regions be executed on server are decided statically or dynamically based complex analysis time and state transfer of every region. Expectedly, is...
We propose in this paper an efficient FALCON accelerator called EFX based on a HW/SW co-design where is post-quantum cryptographic (PQC) scheme tailored as digital signature algorithm (DSA). Our findings reveal that exhibits unique characteristics and structures which distinguish it from other PQC-DSAs. A key finding that, unlike its counterparts, doesn't prioritize single, time-consuming task; instead, processes variety of tasks with comparable execution times. Consequently, the...
A specially designed microcontroller with event-driven sensor data processing unit (EPU) is proposed to provide energy-efficient acquisition for Internet of Things (IoT) devices in rare-event human activity sensing applications. Rare-event applications using a remotely installed IoT device have property very long event-to-event distance, so that the inaccurate certain range accuracy error enough extract appropriate events from collected data. The signal-to-event converter (S2E) as...
A smart contract is a program executed on blockchain. However, once the deployed blockchain, it becomes visible to all participants and remains immutable. Thus, any sensitive information or vulnerabilities in contracts can be exposed potential attackers. To protect confidentiality of contracts, existing studies execute trusted execution environment (TEE). they still suffer from memory-vulnerability problems. If an attack such as privilege escalation occurs by exploiting this vulnerability,...
Soft errors are becoming a critical concern in embedded system designs. Code duplication techniques have been proposed to increase the reliability multi-issue systems such as VLIW by exploiting empty slots for duplicated instructions. However, they code size, another important concern, and ignore vulnerability differences instructions, causing unnecessary or inefficient protection when selecting instructions be under constraints. In this article, we propose compiler-assisted dynamic method...
HEVC(high efficiency video coding) achieves much higher coding compared with previous standards at the cost of significant computational complexity. This paper proposes a fast intra mode decision scheme, where edge orientation and sum absolute Hadamard transformed difference (SATD) are used to consider texture characteristics blocks. According these features, numbers candidate modes be tested in rough rate-distortion optimization processes reduced, respectively. In particular, candidates...
With the increasing proliferation of IoT systems, security systems has become very important to individuals and businesses.IoT malware been exponentially since emergence Mirai in 2016.Because system environment is diverse, also various environments.In case existing analysis there no for dynamic by running architectures.It inefficient terms time cost build an that analyzes one analysis.The purpose this paper improve problems limitations provide analyze a large amount malware.Using open source...
We address the problem of instruction selection for Multi-Output Instructions (MOIs), producing more than one result. Such inherently parallel hardware instructions are very common in area Application Specific Instruction Set Processors (ASIPs) and Digital Signal (DSPs) which frequently used System-on-Chips as programmable cores. In order to provide high-level programmability, consequently guarantee widespread acceptance, sophisticated compiler support these cores is high importance. Since...
The rapidly increasing malware goes beyond personal security threats and has a negative effect on criminal society. To prevent these threats, many anti-virus vendors analysts are starving to more efficiently distinguish malicious behavior. In order contribute this, in this study, we try detect behavior by tracking the execution flow of binary code. Our method code utilizing BFS(Breath-First Search)algorithm advances static analysis based code, but it can be combining advantage dynamic...
Today, the amount of malware is growing very rapidly, and types behaviors are becoming diverse.Unlike existing malicious codes, new or variants codes being identified, it takes a lot time to analyze all codes.To solve these problems analysts research effective ways reduce analysis cost.In this paper, we propose method express characteristics detect by using API Sequence for code detection classification.It compares analyzes several expression methods verifies effectiveness through actual...
VLIW (very long instruction word) architectures have proven to be useful for embedded applications with abundant level parallelism. But due the bus width it often consumes more power and memory space than necessary. One way lessen this problem is adopt a reduced bit-width set architecture (ISA) that has narrower word length. This facilitates efficient hardware implementation in terms of area by decreasing bus-bandwidth requirements dissipation associated fetches. In practice, however,...
A compound instruction, encoding several ALU or memory operations within an instruction word, has been regarded as efficient way of improving performance. In the compiler for embedded processors, code generation algorithm instructions built by dealing mainly with selection which is a crucial phase generation. this paper, we propose iterative minimizing detrimental impact register coalescing that applied to generated earlier from phase.
Today, computer systems are widely and importantly used throughout society, malicious codes to take over the system perform actions continuously being created developed.These sometimes found in new forms, but many cases they modified from existing codes.Since there too threatening that generated for human analysis, various studies efficiently detect, classify, analyze essential.There two main ways code.First, static analysis is a technique identify behaviors by analyzing structure of or...
Although 32-bit architectures are becoming the norm for modern microprocessors, 16-bit ones still employed by many low-end processors, which small size and low power consumption of high priority. However, have a critical disadvantage embedded processors that they do not provide enough encoding space to add special instructions coined certain applications. To overcome this, existing adopt non-orthogonal, irregular instruction sets accommodate variety unusual addressing modes thru more opcodes...
The complexity of today's applications increases with various requirements such as execution time, code size or power consumption. To satisfy these for performance, efficient instruction set design is one the important issues because an customized specific can make better performance than multiple instructions in aspect fast decrease size, and low Limited encoding space, however, does not allow adding application-specific complex freely to our architecture. resolve this problem, conventional...
As the spread of IoT systems increases, security has become very important for individuals and companies.IoT malware been increasing exponentially since emergence Mirai in 2016.Since system environment is diverse, also various environments.In case existing analysis system, there no dynamic by running architectures.It inefficient time cost to construct an one analyze numerous malicious codes proceed with analysis.There are so many be analyzed that efficient method required.The goal this paper...
Abstract A multi‐output instruction (MOI) is an that produces multiple outputs to its destination locations. Such inherently parallel instructions are becoming more and popular in embedded processors, due the advances application‐specific architectures. In order provide high‐level programmability thus guarantee widespread acceptance, sophisticated compiler support for these programmable cores necessary. However, traditional tree‐based approaches selection, although very fast, fail exploit...
The ever-increasing demand for faster execution time, smaller resource usage and lower energy consumption has compelled architects of embedded processors to adopt more specialized hardware features with irregular data paths heterogeneous registers that are customized the needs their target applications. These consequently provide a rich set instructions in order enable programmers access these features. Such an instruction is typically multi-output (MOI), which outputs multiple results...
Performance, code size and power consumption are all primary concern in embedded systems. To this effect, VLIW architecture has proven to be useful for applications with abundant instruction level parallelism. But due the long bus width it often consumes more memory space than necessary. One way lessen problem is adopt a reduced bit-width set (ISA) that narrower word length. This facilitates efficient hardware implementation terms of area by decreasing bus-bandwidth requirements dissipation...