- Advanced Memory and Neural Computing
- Ferroelectric and Negative Capacitance Devices
- Advanced Neural Network Applications
- Parallel Computing and Optimization Techniques
- Semiconductor materials and devices
- Adversarial Robustness in Machine Learning
- GNSS positioning and interference
- Low-power high-performance VLSI design
- Advanced Graph Neural Networks
- CCD and CMOS Imaging Sensors
- Error Correcting Code Techniques
- Magnetic properties of thin films
- Physical Unclonable Functions (PUFs) and Hardware Security
- Matrix Theory and Algorithms
- Neural Networks and Reservoir Computing
- Advanced Data Storage Technologies
- Graph Theory and Algorithms
- Neural Networks and Applications
- Geophysics and Gravity Measurements
- Electromagnetic Scattering and Analysis
- Neuroscience and Neural Engineering
- Machine Learning in Materials Science
- Inertial Sensor and Navigation
- Target Tracking and Data Fusion in Sensor Networks
- Anomaly Detection Techniques and Applications
Dalian Maritime University
2022-2024
Beihang University
2015-2024
Hebei Petroleum University of Technology
2024
Hebei University of Technology
2024
China Electronics Technology Group Corporation
2023
Beijing Satellite Navigation Center
2017-2023
Xinjiang University
2023
Dezhou University
2022
Institute of Biophysics
2022
State Key Laboratory of Virtual Reality Technology and Systems
2022
Simultaneous Localization and Mapping (SLAM) is a critical task for autonomous navigation. However, due to the computational complexity of SLAM algorithms, it very difficult achieve real-time implementation on low-power platforms. We propose an energy-efficient architecture ORB (Oriented-FAST Rotated-BRIEF) based visual system by accelerating most time-consuming stages feature extraction matching FPGA platform. Moreover, original descriptor pattern reformed as rotational symmetric manner...
Spin-transfer torque magnetic random access memory (STT-RAM) is a promising and emerging technology due to its many advantageous features such as scalability, nonvolatility, density, endurance, fast speed. However, the operation of STT-RAM severely affected by environmental factors process variations temperature. As temperature rockets up in modern computing systems, it highly desirable understand thermal impact on operations reliability. In this paper, thermal-aware MTJ model, calibrated...
Matrix-vector multiplication, as a key computing operation, has been largely adopted in applications and hence greatly affects the execution efficiency. A common technique to enhance performance of matrix-vector multiplication is increasing parallelism, which results higher design cost. In recent years, new devices structures have widely investigated alternative solutions. Among them, memristor crossbar demonstrates great potential for its intrinsic support high integration density, built-in...
Abstract Amidst the swift progress in unmanned aerial vehicle (UAV) technology, enhancement of navigation precision and robustness is paramount for ensuring flight safety managing intricacies various missions. This research presents a sophisticated, tightly integrated Global Navigation Satellite System (GNSS) Strapdown Inertial (SINS) framework designed to synergize capabilities both systems, thereby mitigating their respective shortcomings adverse environments. By utilizing an Extended...
Abstract Addressing the need for improved GPS accuracy, especially low-dynamic users, this study introduces a augmentation system employing Low Earth Orbit (LEO) satellites. We detail principles of satellite navigation and simulate GPS-LEO constellation to analyse its performance in terms visibility Position Dilution Precision (PDOP). The results demonstrate substantial accuracy with integrated system, as verified by UAV flight experiments. integration LEO satellites is anticipated advance...
Circuit obfuscation is a frequently used approach to conceal logic functionalities in order prevent reverse engineering attacks on fabricated chips. Efficient implementations are expected with lower design complexity and overhead but higher attack difficulties. In this paper, an emerging proposed by leveraging spinorbit torque (SOT) devices based look-up-tables (LUTs) as reconfigurable replace the carefully selected gates. It essentially impossible identify obfuscated gate SOTs inside...
Spin-transfer torque magnetic random access memory (STT-MRAM) is a promising emerging technology due to its various advantageous features such as scalability, nonvolatility, density, endurance, and fast speed. However, the reliability of STT-MRAM severely impacted by environmental disturbances because radiation strike on transistor could introduce potential write read failures for 1T1MTJ cells. In this paper, comprehensive approach proposed evaluate radiation-induced soft errors spanning...
The Bayesian method is capable of capturing real-world uncertainties/incompleteness and properly addressing the overfitting issue faced by deep neural networks. In recent years, networks (BNNs) have drawn tremendous attention to artificial intelligence (AI) researchers proved be successful in many applications. However, required high computation complexity makes BNNs difficult deployed computing systems with a limited power budget. this article, an efficient BNN inference flow proposed...
In this paper, we present a reconfigurable Physically Unclonable Functions (PUF) based on the Spin-Orbit-Torque Magnetic Random-Access Memory (SOT-MRAM), which exploits thermal noise as true dynamic entropy source. Therefore, MRAM cells could be configured to random final states with stochastic switching mechanism. The proposed PUF is constructed and reconfigured by combining small-capacity number generator (TRNG) high-reliability secure hash algorithm (SHA-512), realizing transformation...
Aggregating features from neighbor vertices is a fundamental operation in graph convolution network (GCN). However, the sparsity data creates poor spatial and temporal locality, causing dynamic irregular memory access patterns limiting performance of aggregation on Von Neumann architecture. The emerging processing-in-memory (PIM) architecture based nonvolatile (NVM), like spin-orbit torque magnetic RAM (SOT-MRAM), demonstrates promising prospects alleviating bottleneck. limited capacity PIM...
Transient analysis is the most practical and effective approach for power grid validation, but which very challengeable large scale VLSI chips because it really time consuming requires memory resources. In this paper we proposed a parallel transient simulation efficient analysis. Firstly adopt symmetric formulation NA equation of RLC to reduce usage. Meanwhile, fast Cholesky factorization solver can be used improve efficiency. Secondly, perform partition-based naturally independent subnets...
The importance of cell manipulation and cultivation is increasing rapidly in various fields, such as drug discovery, regenerative medicine, investigation new energy sources. This paper presents a method to transport cells microfluidic chip without contact. A local vortex was generated when high-frequency oscillation microtool induced chip. controlled by tuning the tool's parameters, amplitude frequency. were then transported based on direction movement, their position, posture, trajectories...
Early stage power estimation is critical for SoC architecture exploration and validation in modern VLSI design, but real-time, long time interval accurate still challenging system-level software/hardware tuning. This work proposes a model abstraction approach real-time the manner of machine learning. The singular value decomposition (SVD) technique exploited to abstract principle components relationship between register toggling profile waveform. abstracted automatically instrumented RTL...
Circuit obfuscation techniques have been proposed to conceal circuit's functionality in order thwart reverse engineering (RE) attacks integrated circuits (IC). We believe that a good method should low design complexity and performance overhead, yet, causing high RE attack complexity. However, existing do not meet all these requirements. In this paper, we propose polynomial scheme which leverages special designed multiplexers (MUXs) replace judiciously selected logic gates. Candidate...