- Cryptographic Implementations and Security
- Physical Unclonable Functions (PUFs) and Hardware Security
- Chaos-based Image/Signal Encryption
- Coding theory and cryptography
- Cryptography and Residue Arithmetic
- Advanced Malware Detection Techniques
- Security and Verification in Computing
- Cryptography and Data Security
- Network Security and Intrusion Detection
- Embedded Systems Design Techniques
- Network Packet Processing and Optimization
- Internet Traffic Analysis and Secure E-voting
- Low-power high-performance VLSI design
- IoT and Edge/Fog Computing
- Digital Media Forensic Detection
- Advanced Authentication Protocols Security
- Context-Aware Activity Recognition Systems
- Parallel Computing and Optimization Techniques
- Wireless Body Area Networks
- Radiation Effects in Electronics
- VLSI and Analog Circuit Testing
- Neuroscience and Neural Engineering
- Smart Grid Security and Resilience
- Software-Defined Networks and 5G
- Anomaly Detection Techniques and Applications
KU Leuven
2016-2025
Leiden University
2020-2025
IMEC
2017-2023
Imec the Netherlands
2016-2023
National Taiwan University
2023
ETH Zurich
2022
Hasselt University
2014-2018
University of Lübeck
2018
iMinds
2013-2017
UCLouvain
2017
RFID-tags are a new generation of bar-codes with added functionality. An emerging application is the use for anti-counterfeiting by embedding them into product. Public-key cryptography (PKC) offers an attractive solution to counterfeiting problem but whether publickey cryptosystem can be implemented on RFID tag or not remains unclear. In this paper, we investigate which PKC-based identification protocols useful these applications. We also discuss feasibility based elliptic curve (ECC) and...
Polynomial multiplication is the basic and most computationally intensive operation in ring-learning with errors (ring-LWE) encryption "somewhat" homomorphic (SHE) cryptosystems. In this paper, fast Fourier transform (FFT) a linearithmic complexity of O(nlogn), exploited design high-speed polynomial multiplier. A constant geometry FFT datapath used computation to simplify control architecture. The contribution work three-fold. First, parameter sets which support both an efficient modular...
The field of side-channel analysis has made significant progress over time. Side-channel is now used in practice design companies as well test laboratories, and the security products against attacks significantly improved. However, there are still some remaining issues to be solved for become more effective. consists two steps, commonly referred identification exploitation. understanding leakage building suitable models. exploitation using identified models extract secret key. In scenarios...
In this paper we present a novel true random number generator based on high-precision edge sampling. We use two techniques to increase the throughput and reduce area of proposed randomness source: variable-precision phase encoding repetitive The first technique consists oscillator with high precision in regions around signal edges low everywhere else. This results compact implementation at expense reduced entropy some samples. second repeating sampling frequency until region encoded is...
Network Intrusion detection systems are essential for the protection of advanced communication networks. Originally, these were hard-coded to identify specific signatures, patterns and rule violations; now artificial intelligence machine learning algorithms provide promising alternatives. However, in literature, various outdated datasets as well a plethora different evaluation metrics used prove algorithm efficacy. To enable global comparison, this study compiles configurations create common...
This paper proposes an FPGA-based application-specific elliptic curve processor over a prime field. research targets applications for which compactness is more important than speed. To obtain small datapath, the FPGA's dedicated multipliers and carry-chain logic are used no parallellism introduced. A control unit obtained by following microcode approach, in instructions stored Block RAM. The use of algorithms that prevent Simple Power Analysis (SPA) attacks creates extra cost latency....
Side-channel attacks represent a powerful category of against cryptographic devices. Still, side-channel analysis for lightweight ciphers is much less investigated than instance AES. Although intuition may lead to the conclusion that are weaker in terms resistance, remains be confirmed and quantified. In this paper, we consider various metrics which should provide an insight on resistance attacks. particular, non-profiled scenario use theoretical confusion coefficient empirical optimal...
The aim of this paper is to find cellular automata (CA) rules that are used describe S-boxes with good cryptographic properties and low implementation cost. Up now, CA have been in several ciphers define an S-box, but all those ciphers, the same rule used. This best known as one defining Keccak χ transformation. Since there exists no straightforward method for constructing cryptographic/implementation properties, we use a special kind heuristics -- Genetic Programming (GP). Although it not...
This article proposes a novel mechanism for swarm attestation, i.e., the remote attestation (RA) of multitude interconnected devices, also called devices. Classical RA protocols work with one prover and verifier. Swarm assume that devices in act both as verifier order to attest software integrity all root verifier, typically spanning-tree topology. We propose "scalable heterogeneous layered (SHeLA)," technique swarms. Our approach consists introducing an additional edge layer between The...
In this paper we tackle the open paradoxical challenge of FPGA-accelerated cloud computing: On one hand, clients aim to secure their Intellectual Property (IP) by encrypting configuration bitstreams prior uploading them cloud. other service providers disallow use encrypted mitigate rogue configurations from damaging or disabling FPGA. Instead, require a verifiable check on hardware design that is intended run FPGA at netlist-level before generating bitstream and loading it onto FPGA,...
In this paper we present a novel true random number generator based on high-precision edge sampling. We use two techniques to increase the throughput and reduce area of proposed randomness source: variable-precision phase encoding repetitive The first technique consists oscillator with high precision in regions around signal edges low everywhere else. This results compact implementation at expense reduced entropy some samples. second repeating sampling frequency until region encoded is...
We present a design methodology for embedded tests of entropy sources. These are necessary to detect attacks and failures true random number generators. The central idea this work is use an empirical consisting two phases: collecting the data under attack finding useful statistical feature. In we focus on features that implementable in lightweight hardware. This first paper address on-the-fly based effects. presented illustrated with 2 examples: elementary ring-oscillator TRNG carry-chain...
This paper describes a hardware implementation of an arithmetic processor which is efficient for elliptic curve (EC) cryptosystems, are becoming increasingly popular as alternative public key cryptosystems based on factoring. The modular multiplication implemented using Montgomery in systolic array architecture, has the advantage that clock frequency becomes independent bit length m.