- Analog and Mixed-Signal Circuit Design
- Advancements in Semiconductor Devices and Circuit Design
- Low-power high-performance VLSI design
- Radio Frequency Integrated Circuit Design
- CCD and CMOS Imaging Sensors
- Advanced Memory and Neural Computing
- Advancements in PLL and VCO Technologies
- Antenna Design and Analysis
- Neuroscience and Neural Engineering
- Microwave Engineering and Waveguides
- Advanced Semiconductor Detectors and Materials
- IoT-based Smart Home Systems
- Energy Harvesting in Wireless Networks
- VLSI and FPGA Design Techniques
- Quantum-Dot Cellular Automata
- Energy Efficient Wireless Sensor Networks
- Semiconductor materials and devices
- Advanced Image Fusion Techniques
- Smart Parking Systems Research
- Power Systems Fault Detection
- Islanding Detection in Power Systems
- IoT and GPS-based Vehicle Safety Systems
- Water Quality Monitoring Technologies
- Advanced MEMS and NEMS Technologies
- Image Enhancement Techniques
Indira Gandhi Delhi Technical University for Women
2016-2025
Indira Gandhi Institute of Technology
2011-2024
Dr. A.P.J. Abdul Kalam Technical University
2019-2020
Andalas University
2018
Guru Gobind Singh Indraprastha University
2009-2015
Council of Scientific and Industrial Research
2015
GITAM University
2012
In today's life we have to face many problems, one of which being traffic congestion and it's becoming more serious day after day. Conventional system does not proper monitoring often requires manual handing at junction. This only causes mental stress in passengers but also lot fuel goes wasted due delay development a handle smart way by automatically adjusting its timing based on density using Arduino Uno ATMega 328. this, is sense digital IR Sensors detect vehicles further the signal...
In this work, a new composite transistor cell using dynamic body bias technique is proposed. This based on self cascode topology. The key attractive feature of the proposed that effect utilized to realize asymmetric threshold voltage structure. has nearly four times higher output impedance than its conventional version. Dynamic increases intrinsic gain by 11.17 dB. Analytical formulation for and parameters been derived small signal analysis. can operate at low power supply 1 V consumes...
The most important criteria for the design and implementation of DSP processor is area optimization reduction in power consumption. fundamental block Finite Impulse Response Filter. (FIR) Filter consists three basic modules which are adder blocks, flip flops multiplier blocks .The performance FIR largely influenced by multiplier, slowest out all. In this paper, has been proposed using two different multipliers namely Array Booth Multiplier both filters have compared various parameters....
As technology becomes faster, smarter, and more compact, it's important to look at work for its potential social benefits. One such area of application is elderly disabled assistance. This paper details the simulation hardware an indoor service robot based on TurtleBot (developed by robotics company Willow Garage). The design, simulation, development done entirely open source platforms, thus significantly reducing costs. sensors, microcontrollers, microcomputer other components are also...
Subthreshold logic provides extremely low power consumption since the supplies are kept below threshold voltage and using small subthreshold current of MOS transistors to operate. circuits ideal for ultra applications however they suffer from operating speeds. By improving speed their application spectrum can be expanded. In this paper a body-bias technique in triple well CMOS technology is explored match currents both NMOS PMOS circuits. We derive an approximate expression generated body...
A Memristor is an electrical component that depends on amount of charge flows through it. combination Memory and Resistor. It non-volatile memory means it remembers the even when power not applied. Similar to Memresistor there Meminductor which Inductor Memcapacitor Capacitor. In this paper, characteristics Memristor, Memcapacitor, Meminductor, Low Pass Filter using High Band have been analyzed. Power Consumption Devices are reduced by 73.5%. The proposed filters implemented simulated PSIPCE.
The technique of body biasing has achieved great success in modern IC design as it, is possible to alter the threshold voltage MOS transistor so that device leakage and timing performance can be improved. In this paper a Schmitt trigger circuit been designed using four types bias techniques. proposed circuits were simulated SPICE 180nm CMOS technology parameters. A comparative study all terms lower upper voltages, noise margins power dissipation done specific applications for each suggested.
Every day the air is fouled by industrial emissions, construction dust, dirty exhaust fumes and waste crop burning. All these many more factors generate a large quantity of harmful pollutants, which in turn has given birth to silent crisis. It need hour that citizens are well aware about safer options they can towards. Globally, we have been hit gigantic wave technology. Witnessing massive growth internet connectivity number satellites, gifted with opportunity forward data from points miles...
In recent days, due to the wide verities of applications Wireless Sensor Networks, it gets recognition from research communities. As sensor nodes are operated through limited battery capacity, how utilise power or energy in an optimum way is a major concern. this paper, we have addressed issue wireless networks. We developed energy-efficient routing protocol. This paper proposes Novel Elite group concept where cluster-head selection process restricted only few high-energy rather than all...
In this paper, a low voltage Schmitt trigger has been designed using various MOS transistor implementation techniques namely-Dynamic Threshold (DTMOS), Multiple threshold (MTMOS), Variable (VTMOS) and Floating gate (FGMOS). The conventional proposed circuits are in 180nm CMOS technology from TSMC simulated at 0.5 Volts. comparative study of the performance triggers terms width hysteresis curve, delay introduced power dissipation for same inputs supply voltages done based on results obtained,...
Adders are basic integral part of arithmetic circuits. The adders have been realized with two styles: fixed stage size and variable size. In this paper, carry skip adder configurations analyzed then a new 16-bit high speed is proposed by modifying the existing structure. has seven stages where first last 1 bit each, it keeps increasing steadily till middle which bulkiest hence nucleus stage. delay power consumption in reduced 61.75% 8% respectively. implemented simulated using 90 nm CMOS...
A sewer is an underground pipe or a tunnel created in concrete for transporting sewage including waste used water from domestic and commercial spaces to the treatment facility disposal. Sewer inlets are present on roads, homes, offices areas enable easy clearance. good system necessity every city. must be roads act as path road runoff flow into. Maintenance of these pipes requirement smooth functioning area. There have been many solutions prevent mitigate clogging inside pipes. But times,...
In the past body terminal was considered as an exclusive source of unwanted second order effects. But recently use is becoming attractive opportunity for improving performance analog integrated circuits. Low frequency harmonic distortion stems from effect and dependent on coefficient. most analysis, present in conventional flipped voltage follower (FVF) has been neglected however submicron low circuits it cannot be neglected. this paper, we propose to utilize positively using dynamic...
Current mirror is one of the basic building blocks mixed mode and analog VLSI systems. For high performance circuit applications at low voltage, accuracy, bandwidth power dissipation are most important parameters to determine current mirror. This paper presents an efficient implementation a flipped voltage follower based using DTMOS technique suitable for low-voltage applications. A comparison conventional proposed presented. The validated with simulation in 0.25μm CMOS TSMC MOSIS. can...
In this work, an improved dynamic threshold MOS (DTMOS) transistor with self-cascode subcircuit has been proposed in work.By adopting the subcircuit, DTMOS could be operated at supply voltage over 0.7V.Apart from this, simulation results for DTMOS, also demonstrate improvement transconductance and bandwidth by a factor of 2.31 1.59 respectively.Furthermore, current driving capability increased 1.87.To validate concept its applications analog circuits, mirror differential amplifier have...
In this work, the performance of ring counter is improved using pulsed latch technique. high speed and low power VLSI applications where heavy pipelining used, there requirement edge triggered flip flops. The migration from flop to has become great success in application. proposed circuit been designed Cadence Virtuoso 90 nm CMOS technology. pulse technique reduces consumption significantly overall an improvement delay product. also require less number transistors for its implementation as...
A novel operational transconductance amplifier (OTA) having high gain and bandwidth for high-speed analog communication techniques precision filtering is designed in this paper. The OTA uses β-multiplier-based current biasing scheme with folded cascode order to improve the small signal models DC of circuit. design was carried out using TSMC 65 nm CMOS technology Cadence Virtuoso tool 1 V supply voltage 10 pf capacitive load. output found be approximately 75.3 dB. In addition, unity frequency...
In this paper we present the design of an ultra low power analog four quadrant multiplier based on second generation current conveyor(CCII). The main attractive feature proposed is that it dynamic threshold MOS transistor (DTMOS). Due to use DTMOS, consumption has been reduced by 99.92 percentage as compared its conventional version. On other hand, able operate at a frequency 2.19MHz and hence suitable for signal processing such biomedical application. Multiplier circuit consists two CCIIs...
This paper presents an attractive approach for bandwidth extension of a four quadrant CMOS analog multiplier. The proposed is based on using dynamic threshold MOS transistor (DTMOS) which effective technique that achieves supply voltage reduction with simultaneous increase in the overall transconductance transistor. multiplier can operate at very high frequencies low 0.6V without any distortion. increases by 4.6GHz unity gain. simulated 180nm technology and has gain comparison to previous...
Last few decades have shown that the low-voltage (LV) low-power (LP) IC designs been given a great attention as power consumption has become challenge. This paper demonstrates implementation of OTA and its application in low pass filter design using bulk-driven MOS transistors (MOST), dynamic threshold MOST, floating-gate MOST quasi-floating-gate MOST. These novel techniques offer good solution by amalgamating benefits (DT), floating gate (FG) quasi (QFG) bulk driven (BD) technique limit...