He Zhang

ORCID: 0000-0001-9262-3106
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About
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Research Areas
  • Advanced Memory and Neural Computing
  • Ferroelectric and Negative Capacitance Devices
  • Magnetic properties of thin films
  • Semiconductor materials and devices
  • Parallel Computing and Optimization Techniques
  • Digital Transformation in Industry
  • Neural Networks and Reservoir Computing
  • Manufacturing Process and Optimization
  • Text and Document Classification Technologies
  • Particle Accelerators and Free-Electron Lasers
  • Particle accelerators and beam dynamics
  • Quantum and electron transport phenomena
  • Flexible and Reconfigurable Manufacturing Systems
  • Infrared Target Detection Methodologies
  • Target Tracking and Data Fusion in Sensor Networks
  • VLSI and Analog Circuit Testing
  • Topic Modeling
  • Video Surveillance and Tracking Methods
  • Advanced Neural Network Applications
  • Advanced Sensor and Energy Harvesting Materials
  • Advanced Text Analysis Techniques
  • Anomaly Detection Techniques and Applications
  • Advancements in Photolithography Techniques
  • Phase-change materials and chalcogenides
  • Recommender Systems and Techniques

Beihang University
2016-2025

University of Electronic Science and Technology of China
2022

Thomas Jefferson National Accelerator Facility
2021

Nanjing University of Posts and Telecommunications
2020

Zhejiang University
2020

University of Nottingham Ningbo China
2018

Chongqing University
2014

Stomatological Hospital of Chongqing Medical University
2013

Chongqing Medical University
2013

10.1007/s00170-017-0233-1 article EN The International Journal of Advanced Manufacturing Technology 2017-03-16

10.1016/j.jmsy.2021.12.011 article EN Journal of Manufacturing Systems 2022-01-01

10.1016/j.jmsy.2022.09.006 article EN Journal of Manufacturing Systems 2022-09-14

Stateful in-memory logic (IML) is a promising paradigm to realize the unity of data storage and processing in same die, exhibiting great feasibility break bottleneck conventional von Neumann architecture. On roadmap toward developing such platform, critical step effective efficient realization complete set functions within memory. In this paper, we report stateful reconfigurable via single three-terminal magnetic tunnel junction (MTJ) device spintronic memory by exploiting novel...

10.1109/ted.2017.2726544 article EN IEEE Transactions on Electron Devices 2017-07-26

Recently, exploiting emerging nonvolatile memories to implement the process-in-memory (PIM) paradigm have shown great potential address von Neumann bottleneck and attracted extensive research development. In this paper, we present a novel PIM platform-spintronic processing unit (SPU), within spin transfer toque magnetic random access memory (STT-MRAM). This energy-efficient reconfigurable platform can perform different tasks-data storage logic computing-using same physical fabric that is...

10.1109/ted.2019.2898391 article EN IEEE Transactions on Electron Devices 2019-02-26

Abstract Mimicking the real‐time sensing and processing capabilities of human retina opens up a promising pathway for achieving vision chips with high‐efficient image processing. The development retina‐inspired chip also requires hardware high sensitivity, fast capture, ability to sense under various lighting conditions. Herein, high‐performance phototransistor based on graphene/organic heterojunction is demonstrated superior responsivity (2.86 × 10 6 A W −1 ), an outstanding respond speed...

10.1002/adfm.202209680 article EN Advanced Functional Materials 2022-10-30

Abstract With the continuous advancement and maturation of technologies such as big data, artificial intelligence, virtual reality, robotics, human-machine collaboration, augmented many enterprises are finding new avenues for digital transformation intelligent upgrading. Industry 5.0, a further extension development 4.0, has become an important trend in industry with more emphasis on human-centered sustainability flexibility. Accordingly, both industrial metaverse twins have attracted much...

10.1186/s10033-025-01210-0 article EN cc-by Chinese Journal of Mechanical Engineering 2025-03-27

Graph neural networks (GNNs) have gained significant attraction due to their expansive real-world applications. To build trustworthy GNNs, two aspects - fairness and privacy emerged as critical considerations. Previous studies separately examined the of revealing trade-off with GNN performance. Yet, interplay between these remains unexplored. In this paper, we pioneer exploration interaction risks edge leakage individual a GNN. Our theoretical analysis unravels that unfortunately escalate...

10.48550/arxiv.2301.12951 preprint EN other-oa arXiv (Cornell University) 2023-01-01

Realization of the unity processing and storage in same chip/die has initialized a promising research direction processing-in-memory (PIM), attempting to address "memory wall" challenge typical von-Neumann computing architectures. Nevertheless, there still exist many issues, which require an efficient implementation PIM. In this paper, we propose novel PIM paradigm architecture support spintronic unit (SPU), within voltage-gated spin Hall effect driven MRAMs. Different from previous studies,...

10.1109/tnano.2019.2914009 article EN IEEE Transactions on Nanotechnology 2019-01-01

SRAM based computing-in-memory (SRAM-CIM) techniques have been widely studied for neural networks (NNs) to solve the "Von Neumann bottleneck". However, as scale of NN model increasingly expands, weight cannot be fully stored on-chip owing big device size (limited capacity) SRAM. In this case, data frequently loaded from external memories, such DRAM and Flash memory, which results in high energy consumption low efficiency. paper, we propose a hybrid-device (HD-CIM) architecture on MRAM...

10.1109/tcsi.2022.3199440 article EN IEEE Transactions on Circuits and Systems I Regular Papers 2022-08-23

In driver assistance systems, thermal cameras are often used because they can provide compensation information for other sensors in the case of darkness or glare. For many existing image vehicle detection algorithms, get a good accuracy some occasions but speed is relatively slow so can't meet real-time requirements. order to address this problem, we proposed algorithm based on yolov3-tiny. We have made two major improvements original The first recalculate anchor box priors by running...

10.1109/icpics50287.2020.9201995 article EN 2020 IEEE International Conference on Power, Intelligent Computing and Systems (ICPICS) 2020-07-01

Binary neural networks (BNNs) are promising for resource-constrained Internet of Things (IoT) devices owing to the lightweight memory and computation requirements. Moreover, BNNs based on computing-in-memory (CIM) architectures have attracted much attention in both algorithm hardware designs. Recently, a variety CIM-based BNN designs has been proposed, particularly emerging nonvolatile memories (NVMs), which merits terms nonvolatility intrinsic resistance-based computing capabilities....

10.1109/ted.2021.3102896 article EN IEEE Transactions on Electron Devices 2021-08-13

Hamming code is a linear error correcting that widely used in memory and communication systems. In general, codec hardware required to encode or decode the information. this brief, we propose for first time spintronic in-memory computing (IMC) network consisting of magnetic tunnel junctions (MTJs) implementation. Such an IMC stores generation matrix parity-check spin transfer torque (STT) MTJ array performs vector multiplication (VMM) with modulo-2 generate desired codewords syndrome-vectors...

10.1109/tcsii.2022.3144678 article EN IEEE Transactions on Circuits & Systems II Express Briefs 2022-01-20

Spintronic memory has been considered as one of the most promising nonvolatile candidates to address leakage power consumption in post-Moore's era. To date, spintronic magnetic random access (MRAM) family mainly evolved four-generation technology advancement, from toggle-MRAM (product 2006), STT-MRAM 2012), SOT-MRAM (intensive R&D today), and VCMA- MRAM today). In addition, another memory, named racetrack (RM), proposed 2008, also two generations domain wall (DW) based RM skyrmion-based RM....

10.1109/nanoarch47378.2019.181298 article EN 2019-07-01

SRAM-based computing-in-memory (SRAM-CIM) provides fast speed and good scalability with advanced process technology. However, the energy efficiency of state-of-the-art current-domain SRAM-CIM bit-cell structure is limited peripheral circuitry (e.g., DAC/ADC) for high-precision expensive. This paper proposes a charge-pulsation SRAM (CP-SRAM) to achieve ultra-high energy-efficiency thanks its charge-domain mechanism. Furthermore, our proposed CP-SRAM CIM supports configurable precision...

10.1145/3489517.3530398 article EN Proceedings of the 59th ACM/IEEE Design Automation Conference 2022-07-10

Abstract Resistive random access memories (RRAMs) are promising candidates for future nonvolatile memories. Here, a flexible resistive switching (RS) device is constructed by spin coating an RS film of graphene oxide (GO) incorporating with TiO 2 nanoparticles, denoted as TGO, on indium‐doped tin electrode. The TGO highly and optically transparent (92–98%), the demonstrates excellent characteristics (centralized SET RESET voltages large ratio) at low voltage 0.5 V. behavior found to...

10.1002/aelm.202000151 article EN Advanced Electronic Materials 2020-04-13

Data movement overheads caused by the recent explosion in big data applications have made traditional von Neumann architecture fails to tackle workloads. Processing Memory (PIM), where computational tasks are performed within memory, has drawn increasing attention. To present meaningful insights readers, we divide current PIM paradigm into charge-based and resistance-based categories according different memory devices. This mini tutorial aims provide a concise overview of implementation...

10.1109/tcsii.2022.3172494 article EN IEEE Transactions on Circuits & Systems II Express Briefs 2022-05-04

Convolutional neural networks (CNNs) have been widely utilized in modern artificial intelligent (AI) systems. In particular, GoogLeNet, one of the most popular CNNs, consisting a number inception layers and max-pooling layers, has intensively studied for mobile embedded scenarios. However, energy efficiency GoogLeNet hardware is still limited as huge data movement between processor memory. Therefore, designing dataflow corresponding architecture to achieve parallel processing with minimal...

10.1109/jetcas.2023.3243619 article EN IEEE Journal on Emerging and Selected Topics in Circuits and Systems 2023-02-09

Star sensor is a preferred attitude measurement device for its extremely high accuracy. acquisition the essential and critical procedure, which aiming at acquiring accurate star areas. However, degenerated results under complex conditions become one of major restrictions modern sensor. In this paper, an autonomous method proposed. Mathematical morphology variable thresholding are combined extraction; motion PSF estimated in frequency domain nonlinear filter adopted restoration. Accurate can...

10.1155/2017/1643967 article EN cc-by Mathematical Problems in Engineering 2017-01-01
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