Daniel Arbet

ORCID: 0000-0001-9412-4503
Publications
Citations
Views
---
Saved
---
About
Contact & Profiles
Research Areas
  • Analog and Mixed-Signal Circuit Design
  • Advancements in Semiconductor Devices and Circuit Design
  • Low-power high-performance VLSI design
  • VLSI and Analog Circuit Testing
  • Integrated Circuits and Semiconductor Failure Analysis
  • Sensor Technology and Measurement Systems
  • Radio Frequency Integrated Circuit Design
  • Advancements in PLL and VCO Technologies
  • Energy Harvesting in Wireless Networks
  • Semiconductor materials and devices
  • Advanced MEMS and NEMS Technologies
  • Innovative Energy Harvesting Technologies
  • Electrostatic Discharge in Electronics
  • CCD and CMOS Imaging Sensors
  • Advanced DC-DC Converters
  • Advanced Battery Technologies Research
  • Advanced Sensor and Energy Harvesting Materials
  • Wireless Power Transfer Systems
  • Magnetic Field Sensors Techniques
  • Silicon Carbide Semiconductor Technologies
  • Neuroscience and Neural Engineering
  • VLSI and FPGA Design Techniques
  • Mechanical and Optical Resonators
  • Semiconductor Lasers and Optical Devices
  • Wireless Body Area Networks

Slovak University of Technology in Bratislava
2015-2024

Institute of Electronics
2020

Warsaw University of Technology
2014-2015

Laboratoire d'Informatique, de Robotique et de Microélectronique de Montpellier
2014

Brno University of Technology
2014

University of Bremen
2014

École Centrale de Lyon
2014

Polytechnic University of Turin
2014

A new solution for an ultra-low-voltage (ULV), linear operational transconductance amplifier (OTA) is presented in this brief. The circuit based on a non-tailed, classAB differential stage, combined with additional resistor, which suppress the third-order harmonic term component, thus providing highly DC transfer characteristic no extra power consumption. While fabricated 0.13 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math...

10.1109/tcsii.2022.3144095 article EN IEEE Transactions on Circuits & Systems II Express Briefs 2022-01-18

In this work, a new versatile voltage- and transconductance-mode analog filter is proposed. The filter, without requiring resistors, employs three differential-difference transconductance amplifiers (DDTAs) two grounded capacitors, which suitable for integrated circuit implementation. Unlike previous works, the proposed topology provides: (1) high-input low-output impedances voltage-mode (VM) that desirable in cascade method of realizing higher order filters, (2) high-output (TM) any...

10.3390/s23020688 article EN cc-by Sensors 2023-01-06

Abstract In this paper, a review and analysis of different design techniques for (ultra) low-voltage integrated circuits (IC) are performed. This shows that the most suitable methods analog IC in standard CMOS process include using bulk-driven MOS transistors, dynamic threshold transistors operating weak or moderate inversion regions. The main advantage such is there no need any modification structure process. Basic circuit building blocks like differential amplifiers current mirrors...

10.1515/jee-2017-0036 article EN Journal of Electrical Engineering 2017-08-28

10.1016/j.aeue.2021.154098 article EN AEU - International Journal of Electronics and Communications 2021-12-25

A new on-chip oscillation test strategy for analog and mixed-signal circuits is presented. In the proposed method, onchip Schmitt trigger used as frequency reference to compensate influence of process parameter variations. Furthermore, this solution also brings possibility implement Oscillation-based Built-In Self-Test (OBIST) integrated circuits. The OBIST has been experimentally applied active filters, its efficiency in detecting hard-detectable catastrophic faults To demonstrate...

10.1109/tnano.2013.2251656 article EN IEEE Transactions on Nanotechnology 2013-03-07

The paper brings an overview of main challenges and design techniques effectively applicable for ultra-low voltage analog integrated circuits in nanoscale technologies.New linked with a low value the supply process fluctuation nanotechnologies, such as device models, robustness to variation, mismatch others are discussed firstly.Then, approaches towards (ultra) low-voltage systems applications described.Finally, examples basic building blocks ICs designed standard CMOS technology using...

10.13164/re.2018.0171 article EN cc-by Radioengineering 2018-04-12

In this paper, different topologies of gate-driven and bulk-driven current mirrors designed in 90 nm CMOS technology are presented. Since the conventional MOS transistors can work as a device, there is no need for any modification existing MOSFET structure or process. The mirror capable operating at power supplies down to threshold voltage standard device. Bulk-driven were compared their equivalents terms main properties output characteristics. achieved results prove that design technique...

10.1109/ddecs.2016.7482457 article EN 2016-04-01

In this paper, a variable gain amplifier designed in 130 nm CMOS technology is presented. The proposed based on the bulk-driven approach, which brings possibility to operate with low supply voltage (i.e. 0.6 V). Since of only V used for operate, there no latchup risk that usually represents main drawback approach. As an input stage, bulk driven transistors are used, makes possible rail-to-rail range. Achieved simulation results indicate VGA can be varied wide range, together feature make...

10.1109/ddecs.2016.7482439 article EN 2016-04-01

In this paper, a fully differential difference amplifier designed in 0.35 μm CMOS technology is presented. The proposed reaches high dynamic range and low input noise. Comparison of noise performance the to an ordinary has been performed. Simulation results prove that developed circuit can be advantageously used applications require signal. our work, experimentally employed analog front end readout interface for MEMS (Micro-Electro-Mechanical-Systems) capacitive microphone.

10.1109/ddecs.2015.38 article EN 2015-04-01

A new strategy for on-chip test of an operational amplifier as a part complex analog and mixed-signal systems is described. During mode, the disconnected from rest circuit transformed to oscillator. To evaluate circuit, its oscillation frequency then compared given by Schmitt trigger oscillator, used reference compensate technology variations. This method might bring possibility implement Oscillation-based Built-In Self-Test (OBIST) amplifiers systems.

10.1109/ddecs.2011.5783050 article EN 2011-04-01

In this paper, a variable gain amplifier (VGA) designed in 130 nm CMOS technology is presented. The proposed based on the bulk-driven (BD) design approach, which brings possibility to operate with low supply voltage. Since voltage of only 0.6 V used for operate, there no risk latch-up event that usually represents main drawback BD circuit systems. transistors are employed input differential stage, makes it possible rail-to-rail range. Achieved simulation results indicate VGA can be varied...

10.1142/s0218126617400035 article EN Journal of Circuits Systems and Computers 2017-02-15

In this paper, a novel bulk-driven cross-coupled charge pump designed in standard 90 nm CMOS technology is presented.The proposed based on dynamic threshold voltage inverter and suitable for integrated ultra-low converters.Due to latchup risk, bulkdriven pumps can safely be used only low-voltage applications.For the input below 200 mV output current of 1 µA, topology achieve about 10 % higher efficiency than conventional gate-driven pump.Therefore, it effectively DC-DC converters, which are...

10.13164/re.2016.0321 article EN cc-by Radioengineering 2016-04-14

The wireless power transfer (WPT) systems, in conjunction with active implantable medical devices (AIMDs), belong to the most discussed topics last years. Recently, low frequency (inductive) or near-field electromagnetic energy make integration of AIMDs easier and simplified that supports their miniaturization. This paper deals possibilities realization secondary coil directly on integrated circuit (IC) chip standard UMC 130 nm CMOS process. We also bring a comparison proposed solution...

10.1109/iceta.2016.7802071 article EN 2016-11-01

The paper deals with design and analysis of a variable-gain amplifier (VGA) working very low supply voltage, which is targeted for low-power applications. proposed was designed using the bulk-driven approach, suitable ultra-low voltage circuits. Since power less than 0.6 V, there no risk latchup that usually main drawback topologies. VGA in 130 nm CMOS technology 0.4 V. achieved results indicate gain can be varied from 0 dB to 18 dB. Therefore, it effectively used many applications such as...

10.1109/mipro.2016.7522109 article EN 2016-05-01

This paper deals with comparison of two discrete methods for digital trimming the input offset voltage in operation amplifiers designed 90nm CMOS technology. Two different topologies based on binary weighed ladder, one using successive approximation register (SAR) and other employing a simple counter, were compared. Furthermore, correction circuit was proposed used to form mean increase probability that its value after process will be near zero. Finally, achieved results improvements are discussed.

10.1109/ddecs.2013.6549802 article EN 2013-04-01

Research presented in this paper is aimed at the comparison of Oscillation-based Built-In Self Test (OBIST) efficiency covering catastrophic and parametric faults active analog integrated filters designed two different technologies. Sallen-Key topologies low-pass high-pass were used as Circuit Under (CUT), 0.35μm 90nm CMOS The oscillation test strategy uses on-chip Schmitt oscillator reference frequency source to compensate influence process parameter variations. Achieved results show that...

10.1109/ddecs.2013.6549830 article EN 2013-04-01

Dynamic supply current test method (I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DDT</sub> test) in static random access memory (SRAM) cell arrays is addressed order to unveil weak open defects. Simulations were carried out on a 64-bit SRAM circuit, where several parameters of the I waveform monitored. The circuit was designed 90 nm CMOS technology. Efficiency unveiling defects evaluated and achieved results compared for four with cells...

10.1109/ddecs.2012.6219046 article EN 2012-04-01

The paper is focused on the design and analysis of a Voltage-to-Frequency Converter (VFC) that was implemented in 130 nm CMOS technology. proposed VFC designed using bulk-driven technique can reliably work with power supply voltage 0.4 V. Since its basic building block Fully Differential Difference Amplifier (FDDA), has differential output. Therefore, high output frequency dynamic range (Δf <sub xmlns:mml="http://www.w3.org/1998/Math/MathML"...

10.23919/mipro.2019.8756910 article EN 2019-05-01
Coming Soon ...