A5002784394- Analog and Mixed-Signal Circuit Design
- Low-power high-performance VLSI design
- Advancements in Semiconductor Devices and Circuit Design
- CCD and CMOS Imaging Sensors
- Advancements in PLL and VCO Technologies
- Atrial Fibrillation Management and Outcomes
- Analytical Chemistry and Sensors
- Cardiac electrophysiology and arrhythmias
- Cardiac Arrhythmias and Treatments
- Sensor Technology and Measurement Systems
- Advanced Electrical Measurement Techniques
- Radio Frequency Integrated Circuit Design
- Palliative Care and End-of-Life Issues
- Conducting polymers and applications
- Traditional Chinese Medicine Studies
- Cardiovascular and Diving-Related Complications
- Soft Robotics and Applications
- Heart Failure Treatment and Management
- Magnetic Field Sensors Techniques
- Health Promotion and Cardiovascular Prevention
- Augmented Reality Applications
- Wireless Power Transfer Systems
- Ethics in medical practice
- Spectroscopy Techniques in Biomedical and Chemical Research
- Advanced DC-DC Converters
University College Cork
2018-2024
National University of Ireland
2022-2023
King's College London
2019-2022
National Microelectronics Applications Centre (Ireland)
2020-2022
St Thomas' Hospital
2019-2022
St. Vincent's University Hospital
2020
University of Limerick
2017
University Hospital Limerick
2016
Food for Health Ireland
2015
Lux Research (United States)
2011
This letter presents a low-power dynamic comparator for ultralow power applications. The prototype is designed in 65-nm CMOS process with supply voltage of 1 V and compared against the widely used double tail latch terms consumption input referred rms noise. addition cross-coupled devices to differential pair prevents internal nodes from fully discharging ground contrast conventional architecture. reduces while achieving similar noise levels. Measurements demonstrate that proposed achieves...
Abstract Aims In the PARADIGM‐heart failure trial, sacubitril‐valsartan demonstrated a reduction in heart admissions and reduced all‐cause mortality patients with ejection fraction. Although real world data have shown similar benefits regarding efficacy safety, there has been difficulty achieving target dose (TD). The factors preventing achievement of TD remains unclear. This study assesses tolerability, ability to achieve, linked attaining routine clinical population. Methods results is...
This paper presents a compact and low-cost on-chip sensor readout circuit. The achieves high-resolution 5-degrees-of-freedom (DoF) tracking (x, y, z, yaw, pitch). With the help of an external wire wound sensor, it can also achieve 6-degrees-of-freedom pitch, roll angles). uses low-frequency magnetic fields to detect position orientation instruments, providing viable alternative using X-rays in image-guided surgery. To measure local field, highly miniaturised capable sensing field has been...
This brief presents an overview of the recent advances in noise shaping SAR ADCs. It discusses fundamentals behind operation and two main implementation topologies. Error feedback cascaded integrators feedforward topologies are examined. Active passive circuit level implementations, with emphasis deep nanometre CMOS processes, discussed along associated design trade-offs. Trends area such as multi-stage implementations also discussed.
This work is an overview of silicon photomultipliers (SiPMs) with a view to defining their importance for bio-photonic and clinical applications. SiPMs are benchmarked against other common photodetectors, namely, PIN diodes avalanche photodetectors (APDs) compared respect important circuit design parameters. It will be shown that careful selection the bias voltage, overvoltage, gain components device integration micro-optics can allow SiPM detectors achieve considerable sensitivity...
Methods for coupling power from a dielectric resonator to light-emitting plasma have been previously described (Gilliard et al IEEE Trans. Plasma Sci. at press). Inevitably, regardless of the efficiency transfer, much emitted light is absorbed in itself which physically surrounds if not all radiating material. An investigation into method presented here efficiently longitudinally mounted vessel on surface material resonator, thereby eliminating significant absorption within structure. The...
This paper presents a toolbox for the behavioral simulation of SAR ADCs in Simulink®. The models include most limiting circuit effects such as sampled thermal noise, capacitor mismatch, finite settling, comparator noise and offset. A user friendly interface is also included to allow study high-level design ADCs, which illustrated by means example. It shown that proposed several orders magnitude faster than electrical simulators, while keeping high accuracy.
This paper presents behavioural modelling and analysis of Error Feedback (EF) SAR ADCs. The capacitor array model proposed here is based in charge equations, which allows accurate the feedback EF-SARs. It also introduces models for amplifier, including offset, non-linear gain, thermal flicker noise, as well sampled kT/C noise switches reference noise. are implemented validated Matlab̅ Simulink̅, showing results with accuracy comparable to transistor-level simulations simulation times several...
This paper presents design analysis and insights for a new continuous-time input pipeline (CTIP) analog-to-digital converter (ADC) architecture that has enhanced bandwidth. An all-pass filter-based analog delay in the signal path allows bandwidth extension to Nyquist bandwidths. A resetting integrator gain stage provides helping increase while reducing power cost. The noise filtering property of preserves medium resistive benefit CTIP ADCs. be implemented with feedforward compensated op-amp...
Many biosensors produce single-ended current outputs. Lab-on-chip applications demand parallel readout channels requiring low area current-to-digital converters. High HD2 has limited the Current Controlled Ring Oscillator's adoption as a area, converter. This work improves CCRO open loop linearity by 10 dB. A wide-bandwidth buffer is also designed. (0.0025 mm2), power (357μW), single-ended, 1 MHz bandwidth converter suitable for array presented with measured performance.
This paper presents the design of a low-latency, highly linear current-steering DAC for use in continuous-time ADCs. A detailed analysis equivalent unary-weighted topologies terms mismatch, noise, and output-impedance related distortion is carried out. From this analysis, we propose tri-level that achieves 12-bit static linearity suitable implementation ADC architecture. To reduce distortion, combines slice impedance matching with proposed compensation technique. By incorporating...
The Current Controlled Ring Oscillator's (CCRO) non-linear characteristic, has limited its performance in ADCs and the lack of an analytical model for this non-linearity slowed adoption. Previously published work constrained CCRO to a dead time. In work, we present understanding dynamic that linearised using We also systematic design methodology demonstrate trade-offs required achieve specified performance, allowing designers evaluate potential ADC before schematic stage. is validated...
This work presents a small-area 2nd-order continuous-time ∆Σ Modulator (CT∆ΣM) with single low dropout regulator (LDO) serving as both the power supply for CT∆ΣM and reference voltage buffer.The is used digitising very amplitude signals in applications such magnetic tracking image-guided robotic surgery.A cascade of integrators feed-forward architecture implemented an adder-less has been proposed to minimise silicon area.In addition, novel pulse-shaped digital-to-analog converter (CT-PS DAC)...
In this paper we consider systems comprising an ADC clocked by TDC-based DPLL and develop all-digital method to generate real-time estimates of the instantaneous timing jitter methods for post-correction / interpolation outputs so as mitigate impact jitter. This enables specification be relaxed facilitation a significant overall system power saving. We propose off-line Least-square estimation design FIR filter use at run-time estimates. also provide details possible first second order...
This paper deals with the design and optimization of biquadratic switched capacitor filters for 4th order quadrature-mirror filter banks allowing real switch effects (e.g. on-state resistance, charge injection...) folded cascode OpAmp designed in 0.35 um CMOS technology. The is as a cascade two biquads each separately optimized using Differential Evolution Algorithm to obtain required transfer function deviation less than ±0.1 dB from function. process baseband signals (0 - 8 kHz) clock...
A complex switched capacitor sigma-delta ADC is described. The used in the VLIF RX path of a GSM/GPRS/EDGE phone and has an SNDR 90 dB 180 kHz bandwidth, with centered at 123 kHz. use noise transfer function allows for more optimal shaping. 2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">nd</sup> order, 1-bit, sampling rate 52 MHz implemented nm CMOS.
This paper highlights the influence of main feedback DAC non-idealities affecting performance Continuous-Time Delta-Sigma Modulators (CTDSMs) in radio receiver Internet-of-Things (IoT) applications. It proposes combination Return-To-Zero (RTZ) pulse and Finite-Impulse-Response (FIR) to have inherent Inter-Symbol-Interference immunity reduced clock jitter sensitivity, which is crucial meet strict linearity Signal-To-Noise-Distortion-Ratio (SNDR) requirements for integrated IoT receivers. The...