A5044733288- Advanced Memory and Neural Computing
- Semiconductor materials and devices
- Ferroelectric and Negative Capacitance Devices
- Advancements in Semiconductor Devices and Circuit Design
- Silicon Carbide Semiconductor Technologies
- Domain Adaptation and Few-Shot Learning
- Phase-change materials and chalcogenides
- Adversarial Robustness in Machine Learning
- Liquid Crystal Research Advancements
- Building Energy and Comfort Optimization
- Multimodal Machine Learning Applications
- Low-power high-performance VLSI design
- Energy Load and Power Forecasting
- Anomaly Detection Techniques and Applications
- CCD and CMOS Imaging Sensors
- Transition Metal Oxide Nanomaterials
- Human Pose and Action Recognition
- Machine Learning and ELM
- Music and Audio Processing
- Intelligent Tutoring Systems and Adaptive Learning
- Neuroscience and Neural Engineering
- Chalcogenide Semiconductor Thin Films
- Bacillus and Francisella bacterial research
- Integrated Circuits and Semiconductor Failure Analysis
- Solid-state spectroscopy and crystallography
Commissariat à l'Énergie Atomique et aux Énergies Alternatives
2014-2025
CEA LIST
2021-2025
CEA Grenoble
2012-2024
Université Grenoble Alpes
2010-2023
Integra (United States)
2021
CEA LETI
2006-2019
Institut polytechnique de Grenoble
2007-2019
Direction de la Recherche Technologique
2014
Institut de Microélectronique, Electromagnétisme et Photonique
2010
Micro and Nanotechnology Innovation Centre
2010
Neuromorphic computing is henceforth a major research field for both academic and industrial actors. As opposed to Von Neumann machines, brain-inspired processors aim at bringing closer the memory computational elements efficiently evaluate machine learning algorithms. Recently, spiking neural networks, generation of cognitive algorithms employing primitives mimicking neuron synapse operational principles, have become an important part deep learning. They are expected improve performance...
This paper addresses two technologies as an example of optimized devices for FPGA and fixed-logic IC design (as non volatile Flip-Flops).
"Normally off, instantly on" applications are becoming common in our environment. They range from healthcare to video surveillance. As the number of and their associated performance requirements grow rapidly, more powerful, flexible power efficient computing units necessary. In such a context, Field Programmable Gate Arrays (FPGA) architectures present good trade-off between flexibility. However, they consume high static can hardly be with gating techniques due long context restoring phase....
Resistive Random Access Memories (ReRAMs) fabricated in the back-end-of-line are a promising breakthrough for including permanent retention mechanisms embedded systems. This low-cost solution opens way to advanced power management schemes. In this paper, we propose novel design architecture of non-volatile flip-flop based on Bipolar ReRAMs (Bi-RNVFF). Compared state-of-the-art Data-Retention (with Balloon latch), proposed is 25% smaller due 6T structure compared 8T flip-flop. Moreover, being...
In this work, for the first time at our knowledge, improvement of chalcogenide-based CBRAM performance and reliability by Sb doping GeS <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> electrolyte is presented. An original analysis, based on in-depth physico-chemical characterization, device electrical measurements, empirical model principle calculations, shown. We argue that optimized ~10% in allows to achieve SET speed 30ns 2.2V (i.e....
Emerging non-volatile memories based on resistive switching mechanisms attract intense R&D efforts from both academia and industry. Oxide-based Resistive Random Acces Memories (OxRAM) gather noteworthy performances, such as fast write/read speed, low power high endurance outperforming therefore conventional Flash memories. To fully explore new design concepts distributed memory in logic, OxRAM compact models have to be developed implemented into electrical simulators assess performances...
This paper proposes a sub-1V, robust and compact SRAM cell in double gate MOS (DGMOS) technology. The presented is six transistors characterized by two word lines connected to the front back of each access transistors, respectively. Simulations, using 32nm low operating power DGMOS predictive model, show excellent read/write stability at minimal transistor dimension. Thanks stability, proposed 6T-2WL also good candidate for voltage applications.
In this paper, the effect of active layer thickness and temperature on switching kinetics GeS 2 -based conductive bridge memories is addressed through electrical characterization. Results are explained in terms a thermally field driven ion hopping model for reversible resistance switching. The combined analysis reveals that at high set voltage decrease. Furthermore, study suggests applying same reset condition, thicknesses lower than 50 nm, filament almost dissolved, while thicker layers...
In this paper, a new continuous multilevel compact model for phase-change memory (PCM) is proposed. It based on the modified rate equations with introduction of variable related to material melting. The evaluated using large set dynamic measurements and shows good accuracy single card. All fitting parameters are discussed, their impacts detailed. Full circuit simulation performed. Good convergence fast time suggest that can be exploited PCM design.
New memories, such as non-volatile resistive memories present bright prospect in catering to the ever-growing memory needs. In this paper, we investigate usage of Oxide Resistive Random Access Memory (OxRRAM) improve communication switchboxes Field-Programmable-Gate-Arrays (FPGAs). We prove interest using unipolar OxRRAM devices thanks a complete methodology, starting from compact model based on self-consistent physical up architectural evaluation typical FPGA benchmarks. Besides, gains...
In this paper, we present a new empirical model able to explain the main features of set and reset processes in Ag-GeS <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> Conductive Bridging Memories. The is carefully validated on wide number experimental data, precisely designed for scope. particular, electrical tests were performed both quasi static pulse modes industrial CBRAM cells. simulations here reported provide insights device...
Back-end-of-line non-volatile resistive memories like Phase Change Memories (PCMs) are promising to solve memory issues in different architectures. In this paper, we investigate the usage of PCM build an elementary configuration node for reconfigurable logic, such as Field-Programmable Gate Arrays (FPGAs). We propose circuit realized by 2 and 1 programming transistor able store a voltage. proposed terms area write time assess its impact on complex circuits. show that yields improvement 1.5x...
Adversarial examples mainly exploit changes to input pixels which humans are not sensitive to, and arise from the fact that models make decisions based on uninterpretable features. Interestingly, cognitive science reports process of interpretability for human classification decision relies predominantly low spatial frequency components. In this paper, we investigate robustness adversarial perturbations enforced during training leverage information corresponding different ranges. We show it...
CBRAMs (Conductive Bridging Random Access Memory) are a kind of Resistive Memories (RRAMs) fabricated in the BEOL (Back-End-Of-Line). They promising breakthrough for including permanent retention mechanisms (non-volatility) embedded systems at low cost. Thus, they becoming very interesting designers community as well. To use this device to design innovative circuits, compact model is mandatory. In paper, we propose continuous physical model, written Verilog-A. Main advantage approach its...
Recent class-incremental learning methods combine deep neural architectures and algorithms to handle streaming data under memory computational constraints. The performance of existing varies depending on the characteristics incremental process. To date, there is no other approach than test all pairs training available at start process select a suited algorithm-architecture combination. tackle this problem, in article, we introduce AdvisIL, method which takes as input main (memory budget for...
With enhancement in the cut-off frequency, CMOS technologies become good candidates for RF applications. Moreover, SOI allow to increase circuit speed, electrical device insulation, suppression of latch up, etc. However, buried oxide increases thermal insulation channel region. A consequence is self heating effect (SHE), which reduce mobility and saturation velocity. This work shows that these degradations are less significant multifinger structures (low resistance) than a single transistor....