Stefano Piersanti

ORCID: 0000-0002-3521-9200
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About
Contact & Profiles
Research Areas
  • 3D IC and TSV technologies
  • Electromagnetic Compatibility and Noise Suppression
  • Electromagnetic Compatibility and Measurements
  • Semiconductor materials and devices
  • Electronic Packaging and Soldering Technologies
  • Integrated Circuits and Semiconductor Failure Analysis
  • Advanced Antenna and Metasurface Technologies
  • Financial Distress and Bankruptcy Prediction
  • Imbalanced Data Classification Techniques
  • Electrostatic Discharge in Electronics
  • Electromagnetic wave absorption materials
  • Credit Risk and Financial Regulations
  • Full-Duplex Wireless Communications
  • VLSI and Analog Circuit Testing
  • Power Line Communications and Noise
  • Antenna Design and Analysis
  • Ultra-Wideband Communications Technology
  • Millimeter-Wave Propagation and Modeling
  • Semiconductor materials and interfaces
  • Antenna Design and Optimization
  • RFID technology advancements
  • Magnetic Properties and Applications
  • Low-power high-performance VLSI design
  • Non-Destructive Testing Techniques
  • Advancements in Semiconductor Devices and Circuit Design

Sapienza University of Rome
2020-2023

Bank of Italy
2020-2023

University of L'Aquila
2013-2019

Radiolabs
2012

This paper describes a measurement campaign performed in modern building at the University of L'Aquila, Italy. Measurements are taken for two large bands around 60 GHz, i.e. 54-59 and 61-66 GHz. The channel probe is an ultrawideband (UWB) PN-sequence signal having bandwidth 1.2 which up-converted to GHz band finely tuned order span whole mentioned bands. were done several different locations, line-of-sight non-line-of-sight scenarios using combinations transmitting receiving antennas: either...

10.1109/icc.2012.6363950 article EN 2012-06-01

Through silicon via (TSV)-based 3-D integrated circuit has introduced the solution to limitlessly growing demand on high system bandwidth, low power consumption, and small form factor of electronic devices. As design aims for higher performance, physical dimensions channels are continuously decreasing. With TSV diameter less than 10 μm pitch several tens micrometers, I/O count increased up order thousands wide bandwidth data transmission. However, without highly precise fabrication process,...

10.1109/tcpmt.2016.2631731 article EN IEEE Transactions on Components Packaging and Manufacturing Technology 2016-12-21

This paper describes a systematic study on the near-field behavior of an electromagnetic interference (EMI) noise suppression absorber materials considering two different types commercial absorbers and excitation source: at first, elementary electric dipole magnetic loop, then using real dimensions coaxial cable for designing loop. Virtual versions material are created simulated with purpose understanding mechanisms high values power loss when is in near field source The focus this...

10.1109/temc.2016.2626299 article EN IEEE Transactions on Electromagnetic Compatibility 2016-11-22

An equivalent circuit model for the transient analysis of through-silicon vias (TSV) taking into account nonlinear metal-oxide-semiconductor effects is proposed. The takes behavior doped silicon substrate in presence electric potential difference due to voltage between TSVs. impact time-variant capacitance via and on crosstalk signal propagation analyzed.

10.1109/temc.2015.2414477 article EN IEEE Transactions on Electromagnetic Compatibility 2015-04-01

This contribution deals with the optimal placement of decoupling capacitances on gridded power delivery network a multichip assembly interposer. The optimization is performed by means nature-inspired algorithm genetic class. Different strategies are considered and compared. cost function based evaluation input impedance looked into ground rails distribution its comparison user-defined mask.

10.1109/temc.2017.2770089 article EN IEEE Transactions on Electromagnetic Compatibility 2017-11-13

Measurements of the 60 GHz ultra-wideband (UWB) indoor channel done in a modern office building at University L'Aquila, Italy, are presented. The UWB sounder is based on PN-sequence correlation technique with pulse width 0.8 ns. Signals recorded different locations line-of-sight and non-line-of-sight scenarios, for each location receiver moved over grid 9 × positions, order to characterize both large small scale behaviors. Samples impulse response six carrier frequencies spanning bands from...

10.1109/icc.2013.6655401 article EN 2013-06-01

One of the state-of-the-art strategies to decrease isolation between sections personal digital assistance devices, taking into account unavoidable thermal, mechanical, weight, and manufacturability constraints is proper introduction electromagnetic (EM) absorbing materials. The global target this study optimized synthesis EM properties a material using machine learning approach. sought must improve shielding effectiveness two regions device. first part paper dedicated assessment performances...

10.1109/temc.2018.2871879 article EN IEEE Transactions on Electromagnetic Compatibility 2018-10-02

This paper introduces an equivalent circuit model for through silicon vias including the nonlinear effect of metal-oxide-semiconductor capacitance. is combined to frequency-dependent via resistance and inductance, as well capacitance conductance substrate a transient analysis. The impact RLCG parameters depletion on signal propagation, crosstalk eye diagram studied using proposed model.

10.1109/temc.2015.2391911 article EN IEEE Transactions on Electromagnetic Compatibility 2015-01-27

The high level of integration in digital electronic chips based on three‐dimensional (3D) technology requires accurate modelling the vertical interconnects (the through silicon vias – TSVs). An prediction signal propagation and crosstalk TSVs cannot be single via since interaction among adjacent a density array neglected. algorithm is proposed that extends approach for TSV with complete analytical evaluation final multiport scattering parameter matrix, thus making electromagnetic such...

10.1049/el.2015.1265 article EN Electronics Letters 2015-06-01

The paper deals with the time domain modeling of hysteretic behavior coupling capacitance from a through silicon via (TSV). model is developed in such way that it can be implemented into standard circuit simulators. Results showing effect hysteresis on electrical performances signal channel containing TSV are shown and discussed.

10.1109/isemc.2015.7256225 article EN 2015-08-01

This paper proposes a numerical solution of the nonlinear equations that describes hysteretic behavior coupling capacitance among through silicon vias in three-dimensional integrated circuits. Behavioral ordinary differential are formulated and solved by an equivalent circuit described SPICE syntax. These results then compared with those obtained measurements.

10.1109/temc.2015.2478849 article EN IEEE Transactions on Electromagnetic Compatibility 2015-10-14

This paper explains the extraction from measurement of parameters necessary in time domain to identify hysteretic behavior coupling capacitance through silicon vias (TSVs). The algorithm was developed such a way that equivalent model can be implemented into standard circuit simulators. A comparison with known procedure based on genetic approach is offered as validation. Results showing robustness and effects hysteresis crosstalk among TSV integrated active devices are reported discussed.

10.1109/temc.2016.2621259 article EN IEEE Transactions on Electromagnetic Compatibility 2016-11-10

Novel de-embedding launch geometries and a simplified analytical procedure are proposed to extract the exact electromagnetic behavior of through silicon via (TSV) pair from measured data. First, most recent method is reviewed it deeply investigated using both 3-D simulation vector network analyzer measurements accurately evaluate its residual error. Then, some potential sources error hypothesized overcome by based on plane that able ensure TEM (or quasi-TEM) mode propagation. The novel...

10.1109/tim.2017.2654068 article EN IEEE Transactions on Instrumentation and Measurement 2017-02-07

To reduce the noise created by a power delivery network, number, value of decoupling capacitors and their arrangement on board are critical to reaching this goal. This work deals with specific improvements, implemented genetic algorithm, which used for optimization in order obtain frequency spectrum input impedance different positions below previously defined values. Measurements performed specifically manufactured validate effectiveness proposed algorithm results obtained example board.

10.3390/electronics8111219 article EN Electronics 2019-10-24

This paper proposes a numerical solution of the nonlinear equations that describes hysteretic behavior ferromagnetic materials. From proper definition and these equations, an equivalent circuit model for core is developed proposed. The results obtained from are compared with those by rigorous solution.

10.1109/temc.2015.2422718 article EN IEEE Transactions on Electromagnetic Compatibility 2015-04-22

In this paper, the electrical performance of test patterns used in de-embedding method for TSV characterization was studied thoroughly. For all patterns, full wave models were built and then analyzed based on simulated performances. Equivalent circuit model analysis parametric study results further demonstrate accuracy models. Furthermore, Scanning Electron Microscopy (SEM) measurements taken optimized measured dimensions. Finally, response pair obtained by pads traces from simulation with...

10.1109/isemc.2016.7571683 article EN 2016-07-01

We propose, for the first time, an explicit semiconductor physics-based through-silicon via (TSV) capacitance-voltage (CV) model. The effect of TSV CV hysteresis is demonstrated in model, and capacitance modeled with respect to dc bias voltage dimension TSV. proposed model verified by comparison measurement results. correlates well This can be utilized a circuit level simulation expand possible application to, but not limited hierarchical power distribution network impedance analysis, RC...

10.1109/tcpmt.2017.2670063 article EN IEEE Transactions on Components Packaging and Manufacturing Technology 2017-03-18

The paper applies the combined SI-PI co-simulation to on chip high speed interconnects. A complete model of and interposer PDN is developed and, together a lumped PCB package PDN, it employed supply I/O drivers for HBM traces laid out silicon interposer. comprehensive analysis carried highlighting impact decoupling capacitor placement their corresponding parasitic inductance voltage ripple output eye diagram at signal receivers.

10.1109/sapiw.2018.8401673 article EN 2018-05-01

Decoupling capacitors are fundamental keys for the reduction of transient noise in power delivery networks; their arrangement and values crucial reaching this goal. This work deals with optimization decoupling a network by using nature-inspired algorithm. In particular, capacitance value location three optimized order to obtain an input impedance below specific mask, algorithm, genetic one, combination two electromagnetic solvers used compute objective function. An experimental board is...

10.3390/electronics8070737 article EN Electronics 2019-06-29
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