Sezer Gören

ORCID: 0000-0002-3688-5280
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About
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Research Areas
  • VLSI and Analog Circuit Testing
  • Integrated Circuits and Semiconductor Failure Analysis
  • Low-power high-performance VLSI design
  • Physical Unclonable Functions (PUFs) and Hardware Security
  • Embedded Systems Design Techniques
  • Formal Methods in Verification
  • Radiation Effects in Electronics
  • Software Testing and Debugging Techniques
  • Image and Signal Denoising Methods
  • Robotics and Sensor-Based Localization
  • Numerical Methods and Algorithms
  • Machine Learning and Algorithms
  • Digital Filter Design and Implementation
  • ECG Monitoring and Analysis
  • Parallel Computing and Optimization Techniques
  • Advanced Vision and Imaging
  • Blockchain Technology Applications and Security
  • Autonomous Vehicle Technology and Safety
  • Vehicle License Plate Recognition
  • Algorithms and Data Compression
  • Cryptographic Implementations and Security
  • Smart Parking Systems Research
  • Genomics and Phylogenetic Studies
  • Interconnection Networks and Systems
  • Neuroscience and Neural Engineering

University of Massachusetts Dartmouth
2025

Yeditepe University
2014-2023

ORCID
2021

Bahçeşehir University
2006-2010

University of California, Santa Cruz
2002-2003

The inherent characteristics of blockchain, including immutability, self-execution, and removing intermediaries, consistently generate increasing interest in its applications within the telecom sector, making it an exciting area for investment. This literature review article aims to explore a promising research known as blockchain interoperability. Interoperability seeks connect two or more independent blockchains exchange information. By leveraging interoperability features networks can...

10.20944/preprints202501.2195.v1 preprint EN 2025-01-29

The inherent characteristics of blockchain, including immutability, self-execution, and the removal intermediaries, consistently generate increasing interest in its applications within telecom sector, making it an exciting area for investment. This literature review aims to explore a promising research known as blockchain interoperability. Interoperability seeks connect two or more independent blockchains effectively exchange information. Through leveraging interoperability features networks...

10.3390/telecom6010020 article EN cc-by Telecom 2025-03-17

Smart surveillance is getting increasingly popular as technologies become easier to use and cheaper. Traditional records video footage a storage device continuously. However, this generates enormous amount of data reduces the life hard drive. Newer devices with Internet connection save Cloud. This feature comes bandwidth requirements extra Cloud costs. In paper, we propose deep learning based, distributed, scalable architecture using Edge computing. Our design both well costs significantly...

10.1109/deep-ml.2019.00009 article EN 2019-08-01

10.1016/j.compeleceng.2006.06.001 article EN Computers & Electrical Engineering 2006-09-30

We describe a novel methodology to exploit the widely used Dynamic Partial Reconfiguration (DPR) support in Field Programmable Gate Arrays (FPGAs) implant hardware Trojan an Advanced Encryption Standard (AES) encryption circuit implemented on FPGA. The DPR is performed by transferring required partial configuration bitstream file over Ethernet connection FPGA board, from attacker's computer which can communicate with network. inserted launches "fault attack" AES circuit, enables recovery of...

10.1145/2668322.2668323 article EN 2014-10-12

Finding the value and/or index of maximum (or minimum) element a set <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math>$n$ </tex-math></inline-formula> numbers (each with xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math>$k$</tex-math></inline-formula> -bits) is fundamental arithmetic operation and needed in many applications. This paper proposes several maximum-finder minimum-finder) circuit topologies, which are parallel....

10.1109/tc.2014.2315634 article EN IEEE Transactions on Computers 2014-04-03

à la diffusion de documents scientifiques niveau recherche, publiés ou non, émanant des établissements d'enseignement et recherche français étrangers, laboratoires publics privés.

10.1109/tc.2017.2707488 article FR IEEE Transactions on Computers 2017-05-23

Nanocrossbars (i.e., nanowire crossbars) offer extreme logic densities but come with very high defect rates; stuck-open/closed, broken nanowires. Achieving reasonable yield and utilization requires mapping that is defect-aware even at the crosspoint level. Such works a map per each manufactured chip. The problem can be expressed as matching of two bipartite graphs; one for to implemented other nanocrossbar. This article shows becomes Bipartite SubGraph Isomorphism (BSGI) within...

10.1145/2000502.2000505 article EN ACM Journal on Emerging Technologies in Computing Systems 2011-08-01

Car parking in crowded cities is a big problem. Drivers have to do blind search find free on-street spot. Blind searching not only causes traffic congestion but also fuel and time consumption. Indoor garages sensors or light systems point out spots, unfortunately, an indoor approach applicable the problem due its expensive nature. In our proposed solution, spots are monitored with roadside cameras. First, street images taken by cameras collected form dataset. Second, Convolutional Neural...

10.1109/isc246665.2019.9071760 article EN 2022 IEEE International Smart Cities Conference (ISC2) 2019-10-01

With the combination of PUFs, obfuscation, and multi-boot, we are able to do equivalent partial bitstream encryption on low-cost FPGAs, which is only featured high-end FPGAs. Low-cost FPGAs not even have built-in support for encrypted (full) bitstreams. Our particular PUF implementation does steal valuable FPGA real estate from actual design with help multi-boot. We favor multi-boot over self reconfiguration as it easier implement.

10.1109/recosoc.2011.5981541 article EN 2011-06-01

Finding the value and/or address (position) of maximum element a set binary numbers is fundamental arithmetic operation. Numerous systems, which are used in different application areas, require fast (low-latency) circuits to carry out this We propose circuit topology called Array-Based finder (AB) determine both and within an n-element k-bit numbers. AB based on carrying all required comparisons parallel then simultaneously computing as well element. This approach ends up with only one...

10.1109/arith.2013.35 article EN 2013-04-01

10.1007/s00521-020-05544-9 article EN Neural Computing and Applications 2021-01-03

The first goal of this paper is to introduce a simple and customizable soft CPU named VerySimpleCPU (VSCPU), which could be easily implemented on FPGAs with complete toolchain including instruction set simulator, assembler, C compiler. second offer use as teaching material within computer architecture/organization courses for students understand the essentials inner workings better by designing one. In addition this, it also aimed teach writing code both in assembly level designed what...

10.1109/ubmk.2018.8566475 article EN 2018 3rd International Conference on Computer Science and Engineering (UBMK) 2018-09-01

As Internet of Things (IoT) technology becomes widespread, the importance information security increases. PRESENT algorithm is a major lightweight symmetric-key encryption for IoT devices. Compared to Advanced Encryption Standard (AES), uses lower amount resources while achieving same level security. In this paper, we implement with different design methodologies including hand-coded RTL, Vivado HLS, PicoBlaze, VerySimpleCPU (VSCPU) based microcontrollers, and customized VSCPU. The VSCPU on...

10.1109/ewdts.2019.8884397 article EN 2019-09-01

Dynamic Partial Reconfiguration (DPR) of Xilinx FPGAs in cases where there is significant logic difference between subsequent configurations made possible by module-based PR flow. supports this flow only for high-end and requires paid license, without which PlanAhead software disables the related knobs features. This poster presents a unique methodology (called DPR-LD) that enables DPR low-end no license. DPR-LD stands Large Differences. uses free difference-based bit file generation...

10.1145/2435264.2435324 article EN 2013-02-11

Division of an integer by constant is a widely used operation and hence justifies customized efficient implementation. There are various versions this operation. This paper attacks particular version problem, where the divisor small circuit outputs quotient remainder. We propose fast (low-latency) yet area-efficient combinational topology, which we call Binary Tree based Constant (BTCD). BTCD uses collection LUTs wired to each other form binary tree. The also has bunch adders, whose...

10.1109/arith.2016.23 article EN 2016-07-01

With the advent of FPGAs, high performance application specific processors can be designed and produced with little investment using a software-like methodology. This ease design, on other hand, creates lot opportunity for design theft through cloning. A solution to this is bitstream encryption, which feature available in rather pricey FPGAs. Physically Unclonable Functions (PUFs) make same capability possible ordinary PUF module provides signature unique each chip help manufacturing...

10.1109/hpcs.2010.5547067 article EN 2010-06-01

Look-Up Table (LUT) implementation of transcendental functions often offers lower latency compared to algebraic implementations at the expense significant area penalty. MultiPartite table method (MP) can circumvent problem by breaking up into multiple smaller LUTs. However, even these LUTs may be big in high accuracy MP designs. Lossless LUT compression applied one or more further improve and timing some cases. The state-of-the-art 2T-TIV 3T-TIV methods decompose Initial Values (TIV) a...

10.1109/vlsi-soc.2019.8920330 article EN 2019-10-01

Location-based services are becoming an important part of life and there is increasing demand for indoor positioning. Combination GPS mobile cellular networks has solved the problem outdoor environments. However, same level precision not been achieved location estimation. The locating environment studied only recently. Much research contributed to innovative concept positioning system. Considering cost effort involved in existing estimation approaches, Augmented Reality (AR) based method one...

10.1109/ficloud.2019.00056 article EN 2019-08-01

Summary Searching for a roadside parking spot in crowded cities is burden. In this article, we propose vision‐based mobile cloud management solution, which fully automated such that it can find spots any street with flowing traffic. To develop system, employ both object detection and road segmentation methods. Thus, do not need to manually label train every distinct mark out boundaries surrounding areas. our approach, convolutional networks, specifically the FCN‐VGG16 model KITTI dataset are...

10.1002/cpe.6006 article EN Concurrency and Computation Practice and Experience 2020-09-14
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